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I
C
NTEGRATED
IRCUITS
1. Introduction
Thank you for using IXYS IC Division's
CPC5622-EVAL-600R evaluation board. The
evaluation board ships with the CPC5622A
LITELINK III and CPC5712U Voltage Monitor to
demonstrate the functionality of a PSTN terminating
two-wire interface that provides both the analog voice
transmission and signaling functions. The analog
interface is configured to provide a 600 resistive AC
impedance with 0dB gain in both the transmit and
receive directions. While the CPC5622A provides the
hook-switch and ringing detect signaling functions, the
CPC5712U is utilized to monitor and detect changes
in the DC line voltage to determine loop status and
signaling information sent by the network. Loop status
is given by the logic level outputs of the three
CPC5712U on-board detectors indicating Loop
Presence, Line In Use, and Loop Polarity.
CPC5622-EVAL-600R evaluation board top and
bottom views are shown in the following illustrations.
Figure 1. Evaluation Board Top View
UG-CPC5622-EVAL-600R - Rev A
D
IVISION
www.ixysic.com
CPC5622-EVAL-600R
LITELINK™ III Evaluation Board
User's Guide
Figure 2. Evaluation Board Bottom View
The printed-circuit board used for the
CPC5622-EVAL-600R evaluation board is a
multi-purpose board that facilitates prototyping of
many PSTN line interface configurations by simple
component changes. Specific evaluation board
models provided by IXYS IC Division can be identified
by the label appended to the core part number
"CPC5622-EVAL-". The suffix label "600R" as shown
in
Figure 1
for this model indicates the two-wire AC
input impedance is 600. For the 600R model, the
transmit and receive gains are 0dB.
600R = 600 resistive AC termination with 0dB
transmit and receive gains.
In addition to the model identification label some
boards may have a second label located just below
the evaluation board part number indicating the
evaluation board's serial number.
1

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Summary of Contents for IXYS CPC5622-EVAL-600R

  • Page 1 PSTN line interface configurations by simple bottom views are shown in the following illustrations. component changes. Specific evaluation board models provided by IXYS IC Division can be identified Figure 1. Evaluation Board Top View by the label appended to the core part number “CPC5622-EVAL-”.
  • Page 2 NTEGRATED IRCUITS IVISION 2. Setup and Using the Evaluation Board This section describes setting up the CPC5622-EVAL-600R Evaluation Board prior to use. 2.1 Connections The CPC5622-EVAL-600R evaluation board uses two PSTN loop connections while J2, the 12-position pin 100 mil (2.54 mm) pitch pin headers, J1 and J2, for the header, provides access for the low voltage side input and output connections.
  • Page 3: Functional Description

    OH* high will cause the unit to go back on-hook. 3. Functional Description The CPC5622-EVAL-600R provides the analog Basic signaling functions for a loop start, current sink interface and signaling functions necessary to interface are loop closure (Off-Hook), loop open implement a PSTN two-wire terminating device for (On-Hook) and ringing detect.
  • Page 4: Pin 6: Loop

    (SELV to T/R). The maximum signal applied to these provides the required logic high when the input is left input pins is 0dBm. (This is 0.548Vp on each input.) open. For applications where the analog source is single www.ixysic.com UG-CPC5622-EVAL-600R - Rev A...
  • Page 5 The required tip to ring termination impedance for the CPC5622-EVAL-600R Pin 9: RING* evaluation board is 600. This is the half-wave ringing detect output RING of the CPC5622A.
  • Page 6 3.7 Stuffing Options solve the receive path noise issue. CPC5622-EVAL-600R Evaluation Boards can be used Above the LITELINK symbol on the schematic shown to evaluate LITELINK III circuits connected to virtually Figure 3 on Page 8 is a capacitor labeled C_PCB.
  • Page 7 LITELINK III Evaluation Board Users Guide NTEGRATED IRCUITS IVISION 4. Compatibility with the CPC5620A and CPC5621A The CPC5622-EVAL-600R evaluation board is The CPC5620A outputs a half-wave ringing detect compatible with the CPC5620A and CPC5621A signal on pin 9, the RING output, while the CPC5621A LITELINKs.
  • Page 8 LITELINK III Evaluation Board Users Guide NTEGRATED IRCUITS IVISION 5. CPC5622-EVAL-600R Design Figure 3. LITELINK CPC5622A Schematic www.ixysic.com UG-CPC5622-EVAL-600R - Rev A...
  • Page 9 The principal circuit components are listed below: 1. (U1) CPC5622A LITELINK 6. FET Heatsink - Top side: Bottom left corner; Bottom side: Bottom right corner. 2. (Q1) CPC5603C FET 3. (U2) CPC5712U 4. (D1) Bridge Rectifier 5. (Q2) Circuit Protector www.ixysic.com UG-CPC5622-EVAL-600R - Rev A...
  • Page 10 Resistors with Tolerance = 1% have a Temperature Coefficient of +/- 100 PPM / C; resistors with Tolerance = 5% have a Temperature Coefficient = 200 PPM / C. Capacitors with Value < 1000pF are NPO / COG; all other capacitors are X7R. www.ixysic.com UG-CPC5622-EVAL-600R - Rev A...
  • Page 11: Litelink Design Resources

    The products described in this document are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of IXYS Integrated Circuits Division’s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage.
  • Page 12 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: IXYS CPC5622-EVAL-EUR CPC5622-EVAL-600R...

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