5 FPGAconf extras................................9 5.1 Auto configuration mode............................. 9 5.2 Scrollbar..................................9 5.3 Terminal..................................9 6 FPGA configuration using Quartus-II JTAG support (Pluto-II/-3)..................10 6.1 JTAG requirements..............................10 6.2 JTAG configuration..............................10 7 FPGA project using Quartus-II (Pluto/-II/-3)........................11 7.1 Create a new project..............................11 7.2 A simple start................................
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14.3 Power consumption..............................19 14.4 Voltage regulator temperature..........................19 15 Connecting the Pluto boards to a PC..........................20 15.1 Serial connection..............................20 15.2 With a TXDI................................20 15.3 With a TXDI/MAX232 or TXDI/FTDI........................20 15.4 Without a TXDI............................... 20 16 Sample C code for RS-232 Win32 send & receive......................21 17 Board checklist................................
1.3 The Pluto boards This guide applies to five different boards (Pluto, Pluto-II, Pluto-IIx / HDMI and Pluto-3). Along this document, when a paragraph apply to all of them, they are collectively named “the Pluto boards” or “the FPGA boards”.
2 Software tools 2.1 Important downloads Each KNJN FPGA board is provided with a “startup-kit” that includes the board documentation and other files (mainly example source code). The startup-kit doesn't include some important software tools that are required as you experiment...
4. “Use alternate COM port for the terminal” (useful if you want the terminal window to use a different port) 5. “Keep COM port open after configuration” (some PCs reset the Pluto board unless this is enabled) 6. “Turbo mode” (allows faster FPGA configuration, works on most boards)
For Pluto-IIx, use ISE iMPACT (part of ISE WebPACK). ● 4.5 Boot-PROM on-demand FPGA configuration On the Pluto-IIx/HDMI/-3 boards, the boot-PROM can also configure the FPGA “on-demand” (i.e. under software control after power-up). Here's a summary of all the boot-PROM features.
FPGAconf has a “scrollbar window” that is activated by pressing CTRL-S. Every time the scrollbar position is changed, a byte between 0 and 255 is sent to the Pluto board (depending of the bar position). That can be used to control easily a servomotor for example, or other simple applications that can be controlled by a single byte.
6 FPGA configuration using Quartus-II JTAG support (Pluto-II/-3) 6.1 JTAG requirements To use the JTAG port, you need a compatible JTAG cable (like an Altera ByteBlaster-MV/II or USB-Blaster) connected to your board's JTAG connector (chapter 10). 6.2 JTAG configuration Follow these steps: In Quartus-II, open the “Programmer”...
7 FPGA project using Quartus-II (Pluto/-II/-3) Pluto, Pluto-II and Pluto-3 are configured from SOF or RBF files generated by Altera’s Quartus-II software. 7.1 Create a new project 1. Run Quartus-II, and click on menu → File → New Project Wizard.
8 FPGA projects with Xilinx's ISE (Pluto-IIx/HDMI) The Pluto-IIx board is configured from BIT files generated by Xilinx's ISE software. 8.1 Create a new project 1. Run ISE Project Navigator, and click on menu → File → New Project. 2. Choose a project name, select the project location, and click Next.
Pluto-IIx board: it doesn't have a native HDMI port but can be fitted with an optional HDMI adapter. ● Pluto-IIx HDMI board: it has a native HDMI port, and can also use an optional HDMI adapter, so in effect has two ●...
Pins 2 & 3 are two FPGA IO pins. The board includes series termination resistors, and Zener protection diodes on ● these 2 signals (Pluto/-II/-3 only). Some revisions of Pluto-II have another secondary connector on the right side of the board, below the power ● header. FPGA RS-232 development boards Page 14...
The Pluto-IIx JTAG signals are accessible on pin headers next to the FPGA. 10.4 JTAG on Pluto-3 Pluto-3 has the regular Altera-style 10 pins header. A matching shrouded connector must be added to the board, like KNJN items 2450 or 2451, so that an Altera or compatible JTAG cable can easily be used.
Limited (1) Limited (1) No Pluto-II Pluto-IIx / HDMI Yes Pluto-3 (1) Pluto's FPGA cannot hold all the FlashyDemo functionality at once, so two FlashyDemo bitfiles are provided. Each covers a different set of features. (2) The KNJN color LCD item#5300 option can work as a FlashyDemo external display.
8.6µs, while sending 0xFE sends a pulse twice that long. Pulses are positive (inactive level is “0”) and they need to be separated by 30µs or so between them. To un-configure Pluto (before sending the RBF), send a “break”...
Pluto-3, and a filename for a “.jic” file. 3. In “Input file to convert”, select the Cyclone EP1C3 for Pluto-II or EP2C5 for Pluto-3 as “Flash loader”, and the SOF file that you want to use for the boot-PROM as “SOF Data”.
14 Power requirements The Pluto boards have their own voltage regulator, so don't have stringent requirements on a power supply. 14.1 Wall adapter Most common (semi-regulated) 5V to 10V “wall adapter” DC supply works fine. In practice, the Pluto boards work with an input voltage as low as 4.5V, or as high as 15V (although the voltage regulator...
FT_PROG utility if required). ● 15.4 Without a TXDI In the absence of a TXDI, the Pluto boards are shipped with a small cable. Connect it to a DB-9 female connector as follow: White wire to DB-9 pin 3. ●...
If the FPGA doesn’t configure, check the following: 1. Make sure the board is powered with a correct voltage. You need 5V minimum at the input of your Pluto board. If you use a TXDI with an integrated 5V regulator, it requires at least 7V to be able to provide 5V to Pluto.
18 Board connectors and headers, with IO pin assignments 18.1 Pluto Pluto has 39+2 IOs available (the +2 are one clock and one dedicated input). Pin 39 is a dedicated clock input. ● Pin 38 can also be used as a clock input.
18.2 Pluto-II Pluto-II has 50+1 IOs available (the +1 is one dedicated clock input). Pin 66 is a dedicated clock input. Pins 34, ● 72, 84 and 92 can also be used as clock inputs. All IOs use 3.3V powered banks that can use different IO standards like LVTTL3.3 or LVCMOS3.3 ●...
18.3 Pluto-IIx All IOs use 3.3V powered banks that can use different IO standards like LVTTL3.3 or LVCMOS3.3 Pluto-IIx IOs are not directly 5V tolerant. Check the Spartan-3A user guide for more details. FPGA RS-232 development boards Page 25...
18.4 Pluto-IIx HDMI All IOs use 3.3V powered banks that can use different IO standards like LVTTL3.3 or LVCMOS3.3 Pluto-IIx IOs are not directly 5V tolerant. Check the Spartan-3A user guide for more details. An optional DIL8 oscillator can be added in the middle of the board (feeds FPGA clock pin 41).
18.5 Pluto-3 Many pins can be used as clock: CLK6 (pin 89), CLK7 (pin 88), DPCLK2 (pin 47), DPCLK4 (pin 64), DPCLK6 (pin ● 87), DPCLK7 (pin 93), DPCLK8 (pin 119), DPCLK10 (pin 136). Also CLK3 (pin 22) is available on a pad.
19 Mechanical drawings All dimensions are given in inches (1” = 25.4mm). The grid is drawn using 0.1” steps (2.54mm). 19.1 Pluto FPGA RS-232 development boards Page 28...
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