3.1 Connector (CN1) Pin Definition
There are 4 Isolated Latch Inputs, 4 A-B-Z Encoder Inputs, 4 TTL
level Inputs, 4 TTL level outputs and 4 Isolated Outputs on PCI-
8124. The following table shows the pin assignment of CN1.
CN1No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
16
Name
I/O
INCOM1
-
LTC1
I
INCOM2
-
LTC2
I
EGND
-
Trigger output reference
TRG1
O
OUTCOM2
-
Trigger output reference
TRG2
O
EA1+
I
EA1-
I
EB1+
I
EB1-
I
EZ1+
I
EZ1-
I
EA2+
I
EA2-
I
EB2+
I
EB2-
I
EZ2+
I
EZ2-
I
TTL-IN1
I
TTL-IN2
I
TTL-OUT1
O
TTL-OUT2
O
DGND
-
INCOM3
-
LTC3
I
INCOM4
-
Function
Latch input common
Latch input
Latch input
Latch input
Trigger output
Trigger output
A-phase encoder (+)
A-phase encoder (-)
B-phase encoder (+)
B-phase encoder (-)
Z-phase encoder (+)
Z-phase encoder (-)
A-phase encoder (+)
A-phase encoder (-)
B-phase encoder (+)
B-phase encoder (-)
Z-phase encoder (+)
Z-phase encoder (-)
TTL input signal
TTL input signal
TTL output signal
TTL output signal
TTL signal ground
Latch input common
Latch input
Latch input common
Signal Connections