Design Recommendations - National Semiconductor LM7705 Manual

The key specifications of the used components are given in
the next part of the section.
Supply Voltage/Reference Voltage
Supply voltage
ADC Voltage Reference
LMP7701
V (typical)
DSAT
V (over temperature)
DSAT
LM7705
Output voltage ripple
Output voltage noise
ADC
Type
Resolution
Quantization level
FIGURE 12. Digitized Output Voltage without (A) and with (B) LM7705
Figure 12A shows the digitized output voltage of the op amp
when its negative supply pin is connected to ground level. The
output of the amplifier saturates at a level of 14 mv (this is in
line with the typical value of 18 mV given in the datasheet)
The graph shows some fluctuations (1 bit quantization error).
Figure 12B show the digitized output voltage of the op amp
when its negative supply pin is connected to the output of the
LM7705. Again, the graph shows some 1 bit quantization er-
rors caused by the voltage ripple and output noise. In this case
the op amps output level can reach the true zero output level.
The graphs in Figure 12 show that:
•
With a single supply, the output of the amplifier is limited
by the V of the output stage.
DSAT
•
The amplifier can be used as a true zero output using a
LM7705.
• The quantization error of the digitized output voltage is
caused by the noise and the voltage ripple.
+5V
+5V
18 mV
50 mV
4 mV
PP
10 mV
PP
ADC122S021
12 bit
5V/4096 = 1.2mV
20173045
(A)
Measurement Results
The output voltage range of the LMP7701 has been mea-
sured, especially the range to ground level. A small DC signal,
with a voltage swing of 50 mV
digitized output voltage of the op amp is measured over a
given time period, when its negative supply pin is connected
to ground level or connected to the output of the LM7705.
Figure 12A and Figure 12B show the digitized output voltage
of the LMP7701 op amp.
• Using the LM7705 does not increase the quantization
error in this set up.

DESIGN RECOMMENDATIONS

The LM7705 is a switched capacitor voltage inverter. This
means that charge is transferred from different external ca-
pacitors, to generate a negative voltage. For this reason the
part is very sensitive for contact resistance between the pack-
age and external capacitors. It's also recommended to use
low ESR capacitors for C
with short traces.
To prevent large variations at the V
recommended to add a decouple capacitor as close to the pin
as possible.
The output voltage noise can be suppressed using a small RF
capacitor, will a value of e.g. 100 nF.
13
is applied to the input. The
PP
20173044
(B)
, C and C in combination
FLY RES OUT
pin of the package it is
DD
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