Microsemi IGLOO 2 Demo Manual
  1. Manuals
  2. Brands
  3. Microsemi Manuals
  4. Signal Processors
  5. IGLOO 2
  6. Demo manual
Microsemi IGLOO 2 Demo Manual

Microsemi IGLOO 2 Demo Manual

Fpga adaptive fir filter
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
IGLOO2 FPGA Adaptive FIR Filter
Demo Guide
June 2014

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the IGLOO 2 and is the answer not in the manual?

Questions and answers

Summary of Contents for Microsemi IGLOO 2

  • Page 1 IGLOO2 FPGA Adaptive FIR Filter Demo Guide June 2014...
  • Page 2 IGLOO2 FPGA Adaptive FIR Filter Demo Guide Revision History Date Revision Change 11 June 2014 Second release 7 January 2014 First release Confidentiality Status This is a non-confidential document.

  • Page 3: Table Of Contents

    Microsemi Publications ........

  • Page 4: Preface

    Intended Audience The following designers using the IGLOO2 devices: • FPGA designers • System-level designers References Microsemi Publications • IGLOO2 FPGA Programming User Guide • IGLOO2 FPGA System Controller User Guide • IGLOO2 FPGA High Performance Memory Subsystem User Guide •...

  • Page 5: Igloo2 Fpga Adaptive Fir Filter Demo

    IGLOO2 FPGA Adaptive FIR Filter Demo Introduction The IGLOO2 FPGA devices integrate a fourth generation flash-based FPGA fabric architecture, which includes embedded mathblocks optimized specifically for digital signal processing (DSP) applications such as, finite impulse response (FIR) filters, infinite impulse response (IIR) filters, and fast Fourier transform (FFT) functions.

  • Page 6: Theory Of Operation

    IGLOO2 FPGA Adaptive FIR Filter Demo Theory of Operation Adaptive filters are mainly categorized into four basic architectures: • System identification • Noise cancellation • Linear prediction • Inverse modeling In this demo, linear prediction architecture is used to implement adaptive filter. The LMS algorithm uses a gradient search technique to determine the filter coefficients that minimize the mean square prediction error.
  • Page 7 IGLOO2 FPGA Adaptive FIR Filter Demo Guide –  y n   h n    x n    – – EQ 1 where, According to 1, narrow-band component y(n), is the adaptive filter output h(n) is the filter coefficients x(n-) is the input signal to the adaptive filter l is the length of the filter (number of taps) k is the index variable...
  • Page 8 IGLOO2 FPGA Adaptive FIR Filter Demo Narrow band signal spectrum Amplitude Wide band signal Frequency Figure 3 • Input Spectrum of Narrow Band Signal + Wide Band Signal Amplitude Wide band signal spectrum Frequency Figure 4 • Output Spectrum of Wide Band Signal R e vi s i o n 2...

  • Page 9: Design Requirements

    USB to UART drivers Microsoft .NET Framework 4 Client for launching demo GUI Framework Demo Design Introduction The design files for this demo can be downloaded from the Microsemi website: http://soc.microsemi.com/download/rsc/?f=IGLOO2_Adaptive_FIR_Filter_DF Design files include: 1. Libero SoC project 2. Programming files 3.

  • Page 10: Demo Design Description

    IGLOO2 FPGA Adaptive FIR Filter Demo Demo Design Description This demo design uses the following blocks: • "Data Handle Block" (SmartDesign) • "Filter Control" (user RTL) • "LMS_FIR_TOP" (Smart Design) • "TPSRAM IP" (IPcore) • "CoreFFT" (IPcore) • "SYSRESET"(IPcore) • "OSC"...
  • Page 11 IGLOO2 FPGA Adaptive FIR Filter Demo Guide • CoreFIR: CoreFIR IP is used in the Reloadable Coefficient mode to configure its coefficients on the fly. CoreFIR IP configuration is as follows: – Version: 8.5.104 – Filter Type: Single rate fully enumerated –...

  • Page 12: Setting Up The Demo Design

    IGLOO2 FPGA Adaptive FIR Filter Demo CoreUART The CoreUART IP is used to transfer the data between the Host PC (GUI) and the IGLOO2 device. The CoreUART Configuration is as follows: • Version: 5.2.2 • TxFIFO: Disable • RxFIFO: Disable •...
  • Page 13 IGLOO2 FPGA Adaptive FIR Filter Demo Guide Figure 7 shows the board setup for running the Adaptive FIR Filter Demo on the IGLOO2 Evaluation Kit. Figure 7 • IGLOO2 FPGA Evaluation Kit Adaptive FIR Filter Demo Setup 5. Ensure that the USB to UART bridge drivers are automatically detected. This can be verified in the Device Manager of the Host PC.

  • Page 14: Programming The Demo Design

    Figure 8 • USB to UART Bridge Drivers 6. If the USB to UART bridge drivers are not installed, download and install the drivers from www.microsemi.com/soc/documents/CDM_2.08.24_WHQL_Certified.zip. Programming the Demo Design The following steps describe how to program the demo design: 1.

  • Page 15: Setting Up The Device

    IGLOO2 FPGA Adaptive FIR Filter Demo Guide 4. In the New Project window, type the project name as IGL2_Adaptive_FIR_Filter Figure 9 • FlashPro - New Project 5. Click Browse and navigate to the location where you want to save the project. 6.

  • Page 16: Programming The Device

    IGLOO2 FPGA Adaptive FIR Filter Demo Programming the Device Figure 10 • FlashPro Project Configured R e visio n 2...
  • Page 17 IGLOO2 FPGA Adaptive FIR Filter Demo Guide The following steps describe how to program the device: Click PROGRAM to start programming the device. Wait until you get a message indicating that the RUN PASSED. Adaptive FIR Filter Demo GUI Figure 11 • FlashPro Project RUN Passed R e v i s i o n 2...
  • Page 18 IGLOO2 FPGA Adaptive FIR Filter Demo The adaptive FIR filter demo is provided with a user friendly GUI that runs on the Host PC and communicates with the IGLOO2 Evaluation Kit. UART is used as the communication protocol between the Host PC and the IGLOO2 Evaluation Kit. Figure 12 •...

  • Page 19: Running The Demo Design

    IGLOO2 FPGA Adaptive FIR Filter Demo Guide Running the Demo Design 1. Launch the adaptive FIR filter demo GUI, install and invoke the executable file provided with the design files. (\\IGLOO2_Adaptive_FIR_Filter\GUI\IGL2_Adaptive_FIR_Filter.exe). The Adaptive FIR Filter Demo window is displayed, refer to Figure Figure 13 •...
  • Page 20 IGLOO2 FPGA Adaptive FIR Filter Demo 3. Signal Generation: Enter the narrow band signal frequency as 2 MHz (supported range is 1 MHz and 20 MHz), and click Generate. Refer to Figure Figure 14 • Signal Generation R e visio n 2...
  • Page 21 IGLOO2 FPGA Adaptive FIR Filter Demo Guide Adaptive FIR Filter Demo adds the wide band signal (generated inside the Adaptive FIR Filter Demo window) to the narrow band signal component and plots the combined signal (Narrow band and Wide band), FFT spectrum. Refer to Figure Figure 15 •...
  • Page 22 IGLOO2 FPGA Adaptive FIR Filter Demo Figure 16 • Adaptive FIR Filter Demo Start R e visio n 2...
  • Page 23 IGLOO2 FPGA Adaptive FIR Filter Demo Guide 5. After completing the filter operation, the GUI displays the error data and its FFT data from the IGLOO2 device and plots as shown in Figure 17. The error signal plot shows the suppression of narrow band component from the signal and outputting wide band signals only after the required number of iterations.
  • Page 24 IGLOO2 FPGA Adaptive FIR Filter Demo The narrow band signal component is suppressed gradually in the Error signal frequency spectrum. This can be observed in the Error signal FFT plot as shown in Figure Figure 18 • Error Signal FFT: Time and Frequency Plot R e visio n 2...
  • Page 25 IGLOO2 FPGA Adaptive FIR Filter Demo Guide 6. You can compare the input wide band and the output wide band signals. Click Compare to analyze the Input wide band data with the Output wide band data. Figure 19 • Compare Error Signal: Time and Frequency Plot 7.
  • Page 26 IGLOO2 FPGA Adaptive FIR Filter Demo 8. The plot can be zoomed in for comparison, refer to Figure Figure 21 • Input Wide Band vs Output Wide Band - Zoomed In 9. Compare the Error signal (output wide band signal) with the input wide band signal, refer to Figure 22.
  • Page 27 IGLOO2 FPGA Adaptive FIR Filter Demo Guide 10. Click Close, refer to Figure Figure 23 • Closing Input Wide Band vs Output Wide Band Window 11. You can copy, save, export and customize page and configure print setup the Error Signal plot. Right click on the Error Signal plot.
  • Page 28 IGLOO2 FPGA Adaptive FIR Filter Demo 14. The input signal and error signal values can be viewed in the Text Viewer tab. Click on the Text Viewer tab and then click on the corresponding View shown in Figure Figure 25 • Text Viewer R e visio n 2...
  • Page 29 IGLOO2 FPGA Adaptive FIR Filter Demo Guide Figure 26 shows the Text Viewer tab showing the Input Signal values. Figure 26 • Text Viewer: Input Signal Values 15. To save the Input Signal as a text file, right-click on the Input Signal window. The Input Signal window displays different options as shown in Figure 27 on page R e v i s i o n 2...
  • Page 30 IGLOO2 FPGA Adaptive FIR Filter Demo 16. Click Save. Select OK to save the text file. Figure 27 • Text Viewer - Input Signal Save Option R e visio n 2...

  • Page 31: Conclusion

    This demo provides information about the features of the IGLOO2 device including mathblocks and how to use Microsemi IPs (CoreFIR and CoreFFT) for narrow band interference cancellation application using Adaptive filters. This Adaptive FIR Filter based demo is easy to use and provides many options to understand and implement DSP filters on the IGLOO2 device.

  • Page 32: Appendix 1: Smartdesign Implementation

    Appendix 1: SmartDesign Implementation Adaptive FIR filter SmartDesign is shown in Figure Figure 1 • Adaptive FIR Filter SmartDesign SmartDesign LMS_FIR_TOP is shown in Figure Figure 2 • SmartDesign LMS_FIR_TOP R e v i s i o n 2...
  • Page 33 IGLOO2 FPGA Adaptive FIR Filter Demo Guide Table 1 describes SmartDesign blocks in Adaptive FIR Filter. Table 1 • Adaptive FIR Filter Demo SmartDesign Blocks and Description S.No Block Name Description DATAHANDLE_0 Handles communication between the Host PC and IGLOO2 Evaluation Kit board. FILTERCONTROL_FSM_ Control logic to generate the control signals for FIR and FFT operations.

  • Page 34: Appendix 2: Resource Usage Summary

    Appendix 2: Resource Usage Summary Table 1 shows adaptive FIR filter demo resource usage summary. Device: IGLOO2 device Die: M2GL010 Package: 484 FBGA Table 1 • Adaptive FIR Filter Demo Resource Usage Summary Used vs Total in Type Used Total Percentage (%) COMB 2978...

  • Page 35: A List Of Changes

    A – List of Changes The following table lists critical changes that were made in each revision of the chapter in the demo guide. Date Changes Page Revision 2 Updated the document for Libero v11.3 software release (SAR 56264). (June 2014) "Theory of Operation"...

  • Page 36: B Product Support

    Microsemi SoC Products Group staffs its Customer Technical Support Center with highly skilled engineers who can help answer your hardware, software, and design questions about Microsemi SoC Products. The Customer Technical Support Center spends a great deal of time creating application notes, answers to common design cycle questions, documentation of known issues, and various FAQs.

  • Page 37: My Cases

    For technical support on RH and RT FPGAs that are regulated by International Traffic in Arms Regulations (ITAR), contact us via soc_tech_itar@microsemi.com. Alternatively, within Cases, select Yes in the ITAR drop-down list. For a complete list of ITAR-regulated Microsemi FPGAs, visit the ITAR web page.
  • Page 38 Outside the USA: +1 (949) 380-6100 Sales: +1 (949) 380-6136 © 2014 Microsemi Corporation. All rights reserved. Microsemi and the Microsemi logo are trademarks of Fax: +1 (949) 215-4996 Microsemi Corporation. All other trademarks and service marks are the property of their respective owners.

Table of Contents