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Watchdog Timer Configuration Register 1‐base address +05h
Bit
Name
7
Reserved
6
WDTMOUT_STS
5
WD_EN
4
WD_PULSE
3
WD_UNIT
2
WD_HACTIVE
1
WD_PSWIDTH
0
Watchdog Timer Configuration Register 2‐base address +06h
Bit
Name
7 - 0
WD_TIME
Watchdog PME Control Register – base address +0Ah
Bit
Name
7
WDT_PME
6
WDT_PME_EN
5 – 1
Reserved
0
WDOUT_EN
R/W
Default
R
0
If watchdog timeout event occurs, this bit will be
R/W
0
If this bit is set to 1, the counting of watchdog time
R/W
0
Select output mode (0:level, 1:pulse) of RSTOUT#
R/W
0
Select time unit (0:1sec, 1:60sec) of watchdog timer
R/W
0
Select output polarity of RETOUT# (1:high active,
R/W
0
R/W
0
0: 1ms
R/W
Default
R/W
0
R/W
Default
This bit will be set when WDT_PME_EN is set and
R
--
the watchdog timer is 1 unit before time out (of
R/W
0
--
--
0: Disable Watchdog time out output via WDTRST#
R/W
0
Description
Reserved
set to 1. Write a 1 to this bit will clear to 0.
is enabled.
by setting this bit.
by setting this bit.
0:low active) by setting this bit.
Select output pulse width of RSTOUT#
1: 25ms
Description
Time of watchdog timer
Description
The PME Status
time out)
0: Disable Watchdog PME
1: Enable Watchdog PME
Reserved
1: Enable Watchdog time output via WDTRST#
PowerBrick
2: 125ms
3: 5s
6.0
TM
20
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