Aaeon FWS-7400 User Manual

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FWS-7400
Network Appliance
nd
User's Manual 2
Ed
Last Updated: November 28, 2016

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Summary of Contents for Aaeon FWS-7400

  • Page 1 FWS-7400 Network Appliance User’s Manual 2 Last Updated: November 28, 2016...
  • Page 2 AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp.  Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation  Core, Atom is a trademark of Intel Corporation ...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity FWS-7400  EAR bracket kit  Console cable  Product DVD  If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document. Preface...
  • Page 6 All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale. Do not use any cables or adapters not supplied by AAEON to prevent system malfunction or fires.
  • Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...
  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................7 List of Jumpers ......................9 2.3.1 Clear CMOS (CMOS) ................10 2.3.2 Auto PWRBTN Selection (JP2) ............
  • Page 12 3.4.2.1 H/W monitor: Smart Fan Function ........37 3.4.3 Advanced: Serial Port Console Redirection ........39 3.4.3.1 Serial Port Console Redirection: Console Redirection Settings ................40 3.4.3.1 Serial Port Console Redirection: Serial Port for Out-of-Band Management/Windows Emergency Management Services(EMS) ........... 43 3.4.4 Advanced: Power Management ............
  • Page 13 Appendix B - I/O Information ....................74 I/O Address Map ....................75 Memory Address Map ..................78 IRQ Mapping Chart ....................80 B.4 DMA Channel Assignments ..................85 Appendix C - Standard LAN Bypass Platform Setting ............86 Status LED ....................... 87 LAN Bypass ......................
  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...
  • Page 15: Specifications

    Specifications System Intel® 4th generation Core™ Processor Processor  240-pin Dual-Channel DDR3 1333/1600 DIMM System Memory  Socket x 2, up to 16 GB Intel® H81 Chipset  Intel ® 82583L controller, Gigabit Ethernet x 6 Ethernet  (optional up to 2 pairs LAN bypass function) AMI BIOS ROM BIOS ...
  • Page 16 Software programming switch x 1 AC power input x 1 Rear Panel I/O  Power switch x 1 Expansion slot x 2 (optional PCI-E[x8] slot x 1) Black Color  Flex ATX 250W Power Supply  430 x 44 x 305 mm (16.9 x 1.73 x 12.01”) Dimension (W x D x H) ...
  • Page 17 10~80% @ 40°C, non-condensing Storage Humidity  0.5 Grms/5~500Hz/ operation (3.5”Hard Disk Anti-Vibration  Drive) 1.5 Grms/5~500Hz/ non-operation 10G peak acceleration (11m sec. duration), Anti-Shock  operation 20G peak acceleration (11m sec. duration), non operation Chapter 1 – Product Specifications...
  • Page 18: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...
  • Page 19: Dimensions

    Dimensions System Chapter 2 – Hardware Information...
  • Page 20: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 21 Solder Side Chapter 2 – Hardware Information...
  • Page 22: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function Auto Power Button CMOS Clear CMOS Chapter 2 – Hardware Information...
  • Page 23: Clear Cmos (Cmos)

    2.3.1 Clear CMOS (CMOS) 1 2 3 1 2 3 Protected (Default) Clear CMOS 2.3.2 Auto PWRBTN Selection (JP2) 1 2 3 1 2 3 Power ON by Button (Default) Auto Power ON Chapter 2 – Hardware Information...
  • Page 24: List Of Connectors

    List of Connectors Please refer to the table below for all of the board’s connectors that you can configure for your application Label Function Front Panel Connector 1 Front Panel Connector 2 KB/MS1 PS2 KB/MS Pin Header VGA1 VGA Pin Header COM2 RS-232 Pin Header USB2...
  • Page 25 Label Function SATA Power Connector CN11~CN15 SATA Power Connector Power Bottom LCM1 LCM Connector ATX1 24Pin ATX Power Connector ATX2 8Pin ATX Power Connector COM1/USB1 COM/USB3 Connector Chapter 2 – Hardware Information...
  • Page 26: Front Panel Connector (Fp1)

    2.4.1 Front Panel Connector (FP1) Signal Signal External Speaker (+) Key Board Lock (+) Internal Buzzer (-) I2C Bus SMB Clock External Speaker (-) I2C Bus SMB Data *Close Pin 5, 7 to enable internal buzzer 2.4.2 Front Panel Connector (FP2) Signal Signal Power On Button (+)
  • Page 27: Com Port Connector (Com2)

    USBP_0N_C USBP_0P_C USBP_1N_C USBP_1P_C 2.4.4 COM Port Connector (COM2) Signal Signal DCD2X SIN2X SOUT2X DTR2X DSR2X RTS2X CTS2X RI2X 2.4.5 KB/MS Connector (KB/MS1) Signal Signal KBDATA KBCLK +5V_KB MSDATA MSCLK Chapter 2 – Hardware Information...
  • Page 28: Installing The Cpu And The Heat Sink

    Installing the CPU and the Heat Sink Loosen the screws and remove the fan duct Chapter 2 – Hardware Information...
  • Page 29 Release the lock pole of the CPU bracket Chapter 2 – Hardware Information...
  • Page 30 Remove the four highlighted screws to remove the HDD bracket Lift up the CPU cover Chapter 2 – Hardware Information...
  • Page 31 Place the CPU to the socket and have the two fillisters locked properly Chapter 2 – Hardware Information...
  • Page 32 Close the CPU bracket and lock the pole to the position Chapter 2 – Hardware Information...
  • Page 33 Cover the Heatsink on the CPU and watch out the direction of the Heatsink that did not against the airflow Fasten the four screws to lock the air duct Chapter 2 – Hardware Information...
  • Page 34: Installing The Two 2.5" Hard Disk Drive (Hdd)

    Installing the Two 2.5” Hard Disk Drive (HDD) Unscrew the upper lid Unfasten the four screws Chapter 2 – Hardware Information...
  • Page 35 put the screw into cushion put the assembled cushions to the upper place of the 2.5” HDD bracket Chapter 2 – Hardware Information...
  • Page 36 put the assembled cushions to the lower place of the 2.5” HDD bracket Lock the HDD to the lower cushions with four screws Chapter 2 – Hardware Information...
  • Page 37 Lock the second HDD to the upper cushions with four screws Lock the HDD bracket to the chassis with four screws Chapter 2 – Hardware Information...
  • Page 38 Connect the SATA cable and power cable to the HDD in lower place 10. Connect the SATA cable and power cable to the HDD in upper place Chapter 2 – Hardware Information...
  • Page 39: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...
  • Page 40: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.
  • Page 41: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...
  • Page 42: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...
  • Page 43: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...
  • Page 44: Advanced: Super Io Configuration

    3.4.1 Advanced: Super IO Configuration Chapter 3 – AMI BIOS Setup...
  • Page 45: Super Io Configuration: Serial Port 1 Configuration

    3.4.1.1 Super IO Configuration: Serial Port 1 Configuration Options summary: Serial Port Disabled Enabled Enable or Disable Serial Port (COM) Serial Port Auto IO=3F8h; IRQ=4; IO=3F8h; IRQ=3,4,5,6,7,9,10,11,12; IO=2F8h; IRQ=3,4,5,6,7,9,10,11,12; IO=3E8h; IRQ=3,4,5,6,7,9,10,11,12; IO=2E8h; IRQ=3,4,5,6,7,9,10,11,12; Select an optimal setting for Super IO device. Chapter 3 –...
  • Page 46: Super Io Configuration: Serial Port 2 Configuration

    3.4.1.2 Super IO Configuration: Serial Port 2 Configuration Options summary: Serial Port Disabled Enabled Enable or Disable Serial Port (COM) Serial Port Auto IO=2F8h; IRQ=3; IO=3F8h; IRQ=3,4,5,6,7,9,10,11,12; IO=2F8h; IRQ=3,4,5,6,7,9,10,11,12; IO=3E8h; IRQ=3,4,5,6,7,9,10,11,12; IO=2E8h; IRQ=3,4,5,6,7,9,10,11,12; Select an optimal setting for Super IO device. Chapter 3 –...
  • Page 47: Super Io Configuration: Parallel Port Configuration

    3.4.1.3 Super IO Configuration: Parallel Port Configuration Options summary: Parallel Port Disabled Enabled Enable or Disable Serial Port (COM) Change Settings Auto IO=378h; IRQ=5; IO=378h; IRQ=5,6,7,9,10,11,12; IO=278h; IRQ=5,6,7,9,10,11,12; IO=3BCh;IRQ=5,6,7,9,10,11,12; Select an optimal setting for Supoer IO device. Device Mode Standard Parallel Port Mode EPP Mode Chapter 3 –...
  • Page 48 ECP Mode EPP Mode & ECP Mode Change the Printer Port mode. Chapter 3 – AMI BIOS Setup...
  • Page 49: Advanced: H/W Monitor

    3.4.2 Advanced: H/W monitor Chapter 3 – AMI BIOS Setup...
  • Page 50: H/W Monitor: Smart Fan Function

    3.4.2.1 H/W monitor: Smart Fan Function Options summary: Smart Fan Mode Full on Mode Automatic Mode Manual Mode Smart Fan Mode Select Fan off temperature limit 15 (0-127) Fan will of when temperature lower than this limit. Fan start temperature limit 45 (0-127) Fan will work when temperature higher than this limit.
  • Page 51 0.5 PWM 1 PWM 2 PWM 4 PWM 8 PWM 15.875 PWM PWM SLOPE Selection Chapter 3 – AMI BIOS Setup...
  • Page 52: Advanced: Serial Port Console Redirection

    3.4.3 Advanced: Serial Port Console Redirection Options summary: Console Redirection Disabled (COM2) Enabled (COM1) Console Redirection Enabled or Disabled. Chapter 3 – AMI BIOS Setup...
  • Page 53: Serial Port Console Redirection: Console Redirection

    3.4.3.1 Serial Port Console Redirection: Console Redirection Settings Options summary: Terminal Type VT100 VT100+ VT-UTF8 ANSI Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100+: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes.
  • Page 54 115200 Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds. Data Bits Data Bits Parity None Even Mark Space A parity bit can be sent with the data bits to detect some transmission errors. Even: parity bit is 0 if the num of 1’s in the data bits is even.
  • Page 55 Enable VT-UTF8 Combination Key Support for ANSI/VT100 terminals Recorder Mode Disabled Enabled On this mode enabled only text will be send. This is to capture Terminal data. Resolution 100x31 Disabled Enabled Enables or disables extended terminal resolution Legacy OS Redirection Resolution 80x24 80x25 On Legacy OS, the Number of Rows and Columns supported redirection...
  • Page 56: Serial Port Console Redirection: Serial Port For

    3.4.3.1 Serial Port Console Redirection: Serial Port for Out-of-Band Management/Windows Emergency Management Services(EMS) Options summary: Out-of Band Mgmt Port COM1 COM2 Microsoft Windows Emergency Management Services(EMS) allows for remote management of a windows server OS through a serial port. Terminal Type VT100 VT100+ VT-UTF8...
  • Page 57 Emulation: ANSI: Extended ASCII char set. VT100: ASCII char set. VT100+: Extends VT100 to support color, function keys, etc. VT-UTF8: Uses UTF8 encoding to map Unicode chars onto 1 or more bytes. Bits per second 9600 19200 57600 115200 Selects serial port transmission speed. The speed must be matched on the other side. Long or noisy lines may require lower speeds.
  • Page 58 A parity bit can be sent with the data bits to detect some transmission errors. Even: parity bit is 0 if the num of 1’s in the data bits is even. Odd: parity bit is 0 if num of 1’s in the data bits is odd.
  • Page 59: Advanced: Power Management

    3.4.4 Advanced: Power Management Options summary: Power Mode ATX Type AT Type Select Power Supply Mode. ACPI Sleep State Suspend Disabled S3 only (Suspend to RAM) Select ACPI sleep state the system will enter when the SUSPEND button is pressed. Restore AC Power Loss Power Off Power On...
  • Page 60 Enabled Enable/Disable Resume from RI# signal. Resume on PCIE Disabled Enabled Enable/Disable Resume from PCIE signal. Wake system with Fixed Time Disabled Enabled Enable or disable System wake on alarm event. When enable, System will wake on the hr::min::sec specified. Wake up day Select 0 for daily system wake up, 1-31 for which day of month that you would like the system to wake up.
  • Page 61: Advanced: Cpu Configuration

    3.4.5 Advanced: CPU Configuration Options summary: Hyper-threading Disabled Chapter 3 – AMI BIOS Setup...
  • Page 62 Enabled Enabled for Windows XP and Linux (OS optimized for Hyper-Threading Technology) and Disabled for other OS (OS not optimized for Hyper-Threading Technology). When Disabled only on thread per enabled core is enabled. Intel Virtualization Technology Disabled Enabled When enabled, a VMM can utilize the additional hardware capabilities provided by Vanderpool Technology.
  • Page 63: Advanced: Sata Configuration

    3.4.6 Advanced: SATA Configuration 3.4.6.1 SATA Configuration: SATA Configuration (IDE) Options summary: SATA Controller(s) Disabled Enabled Enable or disable SATA Device. SATA Mode Selection AHCI Determines how SATA controller(s) operate. Chapter 3 – AMI BIOS Setup...
  • Page 64: Sata Configuration: Sata Configuration (Ahci)

    3.4.6.2 SATA Configuration: SATA Configuration (AHCI) Options summary: SATA Controller Speed Disabled Enabled Enable or disable SATA Device. SATA Mode Selection Default Gen1 Gen2 Gen3 Indicates the maximum speed the SATA controller can support. Port Disabled Enabled Enable or Disable SATA Port Chapter 3 –...
  • Page 65 Hot Plug Disabled Enabled Designates this port as Hot Pluggable. External SATA Disabled Enabled External SATA Support. SATA Device Type Hard Disk Drive Solid State Drive Indentify the SATA port is connected to Solid State Drive or Hard Disk Drive. Spin Up Device Disabled Enabled...
  • Page 66: Advanced: Usb Configuration

    3.4.7 Advanced: USB Configuration Options summary: Legacy USB Support Enabled Disabled Auto Enables Legacy USB support. AUTO option disables legacy support if no USB devices are connected. DISABLE option will keep USB device available only for EFI applications. Chapter 3 – AMI BIOS Setup...
  • Page 67: Advanced: Lan Bypass Configuration

    3.4.8 Advanced: LAN Bypass Configuration Options summary: STATUS LED CTRL LED OFF RED LED ON RED LED BLINK RED LED FAST BLINK GREEN LED ON GREEN LED BLINK GREEN LED FAST BLINK STATUS LED CTRL help. LAN kit Power ON Bypass PassTru Setting LAN kit function behavior when power on.(Bypass/Pass Through)
  • Page 68: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...
  • Page 69: Chipset: Pch-Io Configuration

    3.5.1 Chipset: PCH-IO Configuration Options summary: PCI-E LAN Port n Disabled Enabled Control the PCI Express Root Port. XHCI Mode Smart Auto Auto Enabled Disabled Manual Mode of operation of xHCI controller. Chapter 3 – AMI BIOS Setup...
  • Page 70: Chipset: System Agent (Sa) Configuration

    3.5.2 Chipset: System Agent (SA) Configuration Options summary: VT-d Disabled Enabled Check to enable VT-d function on MCH. Chapter 3 – AMI BIOS Setup...
  • Page 71: System Agent (Sa) Configuration: Graphics Configuration

    3.5.2.1 System Agent (SA) Configuration: Graphics Configuration Options summary : Primary Display Auto IGFX PCIE Select which of Auto/IGFX/PEG/PCIE Graphics device should be Primary Dislpay Or select SG for Switchable Gfx. Internal Graphics Auto Disabled Enabled Keep IGD enabled based on the setup options. DVMT Pre-Allocated 128M 160M...
  • Page 72 256M 288M 320M 352M 384M Select DVMT 5.0 Pre-Allocated (Fixed) Graphics Memory Size used by the Internal Graphics Device. DVMT Total Gfx Mem 128M 256M Select DVMT 5.0Total Graphics Memory Size used by the Internal Graphics Device. Chapter 3 – AMI BIOS Setup...
  • Page 73: System Agent (Sa) Configuration: Memory Configuration

    3.5.2.2 System Agent (SA) Configuration: Memory Configuration Chapter 3 – AMI BIOS Setup...
  • Page 74: Setup Submenu: Boot

    Setup submenu: Boot Options summary: Quite Boot Disabled Enabled Enables or disables Quiet Boot option. Launch PXE OpROM policy DO not launch Legacy only Controls the execution of UEFI and Legacy PXE OpROM Launch LAN #1~6 PXE OpR Disabled Enabled Enable or Disable Legacy Boot Option for LAN #1~6 .
  • Page 75: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers).
  • Page 76: Setup Submenu: Save & Exit

    Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup...
  • Page 77: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...
  • Page 78: Drivers Installation

    Drivers Installation The drivers can be found in the product page for FWS-7400 at aaeon.com. Please follow the sequence below to install the drivers. Step 1 – Install Chipset Drivers Open the Step 1 - Chipset folder followed by the iINF_allOS_9.4.0.1027.exe...
  • Page 79 Step 5 – Install ME Drivers Open the Step 5 - ME folder followed by the Setup.exe file Follow the instructions Drivers will be installed automatically Step 6 – Install IRST Drivers Open the Step 5 - IRST folder followed by the Setup.exe file Follow the instructions Drivers will be installed automatically Chapter 4 –...
  • Page 80: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...
  • Page 81: Watchdog Timer Initial Program

    A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 82 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 83 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
  • Page 84 ************************************************************************************ // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
  • Page 85 ************************************************************************************ VOID SIOEnterMBPnPMode(){ Switch(SIOIndex){ Case 0x2E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0x55); Break; Case 0x4E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0xAA); Break; VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0x02); IOWriteByte(SIOData, 0x02); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN);...
  • Page 86 ************************************************************************************ VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 << BitNum); TmpValue |= (Value << BitNum); IOWriteByte(SIOData, TmpValue); SIOExitMBPnPMode(); VOID SIOByteSet(byte LDN, byte Register, byte Value){ SIOEnterMBPnPMode();...
  • Page 87: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...
  • Page 88: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 89 Appendix B – I/O Information...
  • Page 90 Appendix B – I/O Information...
  • Page 91: Memory Address Map

    Memory Address Map Appendix B – I/O Information...
  • Page 92 Appendix B – I/O Information...
  • Page 93: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 94 Appendix B – I/O Information...
  • Page 95 Appendix B – I/O Information...
  • Page 96 Appendix B – I/O Information...
  • Page 97 Appendix B – I/O Information...
  • Page 98: Dma Channel Assignments

    B.4 DMA Channel Assignments Appendix B – I/O Information...
  • Page 99: Appendix C - Standard Lan Bypass Platform Setting

    Appendix C Appendix C - Standard LAN Bypass Platform Setting...
  • Page 100: Status Led

    Status LED The LED status indicator of FWS-7400 is programmable with AAEON SDK for your application. Table1: LED Status STA_LED2 STA_LED1 STA_LED0 LED Off Red Blinking (Slowly) Red Blinking (Quickly) Reserved Green Blinking (Slowly) Green Blinking (Quickly) Green Table2: Status LED and register mapping table...
  • Page 101 Sample Code: ************************************************************************************ #define Word LED2Add //This parameter is represented from Note1 #define Word LED1Add //This parameter is represented from Note2 #define Word LED0Add //This parameter is represented from Note3 #define Byte LED2Bit //This parameter is represented from Note4 #define Byte LED1Bit //This parameter is represented from Note5 #define Byte LED0Bit //This parameter is represented from Note6 #define Byte UnitVal //This parameter is represented from Note7 ************************************************************************************...
  • Page 102: Lan Bypass

    LAN Bypass Table1: LAN Kit ID Select LAN_ID2 LAN_ID1 LAN_ID0 LAN kit selected LAN Kit 1 Selected LAN Kit 2 Selected LAN Kit 3 Selected LAN Kit 4 Selected LAN Kit 5 Selected LAN Kit 6 Selected LAN Kit 7 Selected LAN Kit 8 Selected Table2: LAN Bypass register table Function...
  • Page 103 Table3: LAN Bypass register mapping table CPLD Slave Address 0x90 (Note1) Attribute Register(I/O) BitNum Value LAN_ID2 0xA05(Note1) 7(Note8) (Note15) LAN_ID1 0xA05(Note2) 6(Note9) (Note15) LAN_ID0 0xA00(Note3) 6(Note10) (Note15) PWR_ON 0xA00(Note4) 4(Note11) (Note15) PWR_OFF 0xA00(Note5) 2(Note12) (Note15) WDT_EN 0xA00(Note6) 1(Note13) (Note15) ACT_EN 0xA00(Note7) 5(Note14) (Note15)
  • Page 104 (Word IoAddr, Byte BitNum) VOID Bypass_Active { BYTE TmpValue; TmpValue = inportb (IoAddr); TmpValue &= ~(1 << BitNum); outport(IoAddr, TmpValue); delay100ms(); TmpValue |= (Value << BitNum); outport(IoAddr, TmpValue); ************************************************************************************ ************************************************************************************ SET_Value (Word IoAddr, Byte BitNum,Byte Value) VOID { BYTE TmpValue; TmpValue = inportb (IoAddr);...
  • Page 105 //Active LAN Bypass setting Bypass_Active (ACT_EN, ACT_EN_R); ************************************************************************************ Appendix C – Standard Firewall Platform Setting...
  • Page 106: Lcd Module

    LCD Module FWS-7400 provides a LCM (LCD Module) to display information via standard parallel port. User is able to program the LCM to express different status. Sample Code void Display_Clear() outportb(0x378, 0x01); wait(); outportb(0x37A, 0xC8); wait(); outportb(0x37A, 0xCA); wait(); void Return_Home() outportb(0x378, 0x02);...
  • Page 107 outportb(0x37A, 0xC8); wait(); outportb(0x37A, 0xCA); wait(); void Display_Off() outportb(0x378, 0x08); wait(); outportb(0x37A, 0xC8); wait(); outportb(0x37A, 0xCA); wait(); void Display_On_Cursor_Off() outportb(0x378, 0x0C); wait(); outportb(0x37A, 0xC8); wait(); outportb(0x37A, 0xCA); wait(); void Display_On_Cursor_On() outportb(0x378, 0x0E); wait(); Appendix C – Standard Firewall Platform Setting...
  • Page 108 outportb(0x37A, 0xC8); wait(); outportb(0x37A, 0xCA); wait(); Appendix C – Standard Firewall Platform Setting...
  • Page 109: Software Reset Button (General Propose Input)

    C.4 Software Reset button (General Propose Input) FWS-7400 provides a general propose input button which status can get by AAEON SDK. Soft Reset Button Configuration Table 2: LAN Bypass relative register table Function Description BTN_STS Reading this register returns the pin level status which is normal high active low.
  • Page 110 Main VOID Byte RstBtn; RstBtn = GET_Value (BTN_STS, BTN_STS_R); // Active Low ************************************************************************************ Appendix C – Standard Firewall Platform Setting...

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