National Semiconductor PC16552C Manual

PC16552C Dual UART DMA
Micro Channel Adapter

Table Of Contents

INTRODUCTION AND FEATURES
PC16552C ADAPTER BLOCK DIAGRAM
PC16552C ADAPTER USER'S GUIDE
POS PROGRAMMABLE OPTION SELECT
An overview of the Micro Channel Programmable Option
Select (POS) a unique feature which replaces all adapter
jumpers and switches with programmable configuration reg-
isters
A POS Mechanism
B Adapter Description File (ADF)
C Configuration Utilities
D POS Registers
E PC16552C Adapter POS Register Design
MICRO CHANNEL BUS INTERFACE
General information on the adapter interface to the Micro
Channel applicable to any adapter design and specific in-
formation on the design of the PC16552C Adapter
A Micro Channel Control Signals
B Data Bus
C Address Decode
D UART Interface
E Interrupts
MICRO CHANNEL BUS ARBITRATION
An overview of the bus arbitration system implemented on
all Micro Channel machines
A Central Arbiter
B Local Arbiter
PC16552C ADAPTER DMA INTERFACE DESIGN
The design of the PC16552C Adapter's Local Arbiter and
interface to the UART DMA request signals is described in
detail
A Design Considerations
B DMA Request Enable
C DMA Request Prioritization
D Arbitration Vector Selection
E Local Arbiter
F Fairness
G Terminal Count Interrupt
SOFTWARE
A Programming the Micro Channel DMA Controller
B Driver Programs
EISA BUS DESIGN COMPARISON
Brief description of a possible EISA bus serial port DMA
design
APPENDICES
A ADF Listing ( 6e6D adf)
B PAL Equations
C 1995 National Semiconductor Corporation
TL F 11195
National Semiconductor
Application Note 770
Greg DeJager
July 1991
APPENDICES (Continued)
C Schematics
D Layout Drawing
E Bill of Materials
INTRODUCTION
The PC16552C integrates two NS16550AF UARTs into a
single package The product provides control for two inde-
pendent PC-AT and PS 2 compatible serial ports In ad-
dition the on-board FIFOs and DMA request strobes of the
PC16552C create the basis for a high-performance serial
port design
Advancing modem technology is causing a substantial in-
crease in serial transfer baud rates putting a severe strain
on existing serial port designs Personal computer systems
are unable to keep up with transfer rates that are now
reaching 115k baud The PC16552C allows the serial port
designer to design ports that can handle these faster data
rates Transmitter and Receiver FIFOs buffer up to 16 bytes
of data each and request strobes signal the system DMA
controller to transfer data to empty transmitter FIFOs and
from full receiver FIFOs DMA burst transfers can move
data from the serial I O ports to system RAM very quickly
with no latency time and no attention from the system CPU
This document contains a user's guide for the adapter and
discusses the considerations involved in designing any Mi-
cro Channel Adapter equipped with a DMA slave It gives an
overview of the Micro Channel POS mechanism adapter
interface and bus arbitration system The design of the
PC16552C Serial DMA Adapter intended as an example of
a DMA slave serial adapter is described in detail A descrip-
ton of the software necessary to facilitate four simultaneous
file transfers serviced by the Micro Channel DMA controller
is also included
PC16552C ADAPTER FEATURES

Two independent PC-AT and PS 2 compatible serial
ports with FIFOs capable of running all existing NS16450
and NS16550AF software

All configuration done through POS mechanism No
hardware jumpers or switches

Serial ports relocatable to all eight standard I O address-
es

Serial interrupts available on IRQ3 and IRQ4

Hardware interface between UART FIFO DMA requests
and the Micro Channel bus arbitration and DMA system

POS configurable priority levels for UART DMA requests
 Support for software enable disable of UART DMA re-
quests
 POS configurable Fairness feature for UART DMA re-
quests
 Automatic interrupt generation and DMA request disable
upon receipt of DMA Terminal Count
 Two DB-9 connectors for the two RS-232 compatible se-
rial ports
RRD-B30M75 Printed in U S A