Samsung SGH-X640 Service Manual page 6

Circuit Description
The modulator is loaded at its IF output by an integrated low pass filter that suppress unwanted spurs prior to get into
the phase detector. The clock drive is generated by division of the RFLO signal provided for the transmit offset mixer.
Baseband IQ signal fed into offset PLL, this function is included inside of U100 chip. OSC101 chip generates modulator
signal which power level is about 6.5dBm and fed into Power Amplifier(U102). The PA output power and power ramping
are well controlled by Auto Power Control circuit. We use offset PLL below table.
Modulation Spectrum
2. Baseband Circuit description of SGH-X640
1. PCF50601
1.1. Power Management
Ten low-dropout regulators designed specifically for GSM applications power the terminal and help ensure optimal system
performance and long battery life. A programmable boost converter provides support for 1.8V, 3.0V, and 5.0V SIMs,
while a self-resetting, electronically fused switch supplies power to external accessories. Ancillary support functions, such
as RTC module and High Voltage Charge pump, Clock generator, aid in reducing both board area and system complexity.
I2C BUS serial interface provides access to control and configuration registers. This interface gives a microprocessor full
control of the PCF50601 and enables system designers to maximize both standby and talk times.
Supervisory functions. including a reset generator, an input voltage monitor, and a temperature sensor, support reliable
system design. These functions work together to ensure proper system behavior during start-up or in the event of a fault
condition(low microprocessor voltage, insufficient battery energy, or excessive die temperature).
1.2. Backlight Brightness Modulator
The Backlight Brightness Modulator (BBM) contains a programmable Pulse-width modulator (PWM) and FET
to modulate the intensity of a series of LED's or to control a DC/DC converter that drives LCD backlight.
But, this phone (SGH-X640) is use UFB LCD. UFB LCD controls backlight brightness by contrast setting.
So "BL_VDD" voltage is always high value when phone is in active mode. When phone is in dimming mode "BL_VDD"
goes to about 10% duty PWM.
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1.3. Clock Generato
The Clock Generator (CG) generates all clocks for internal and external usage. The 32768 Hz crystal
oscillator provides an accurate low clock frequency for the PCF50601 and other circuitry.
2. LCD Connector
LCD is consisted of main LCD(color 65K UFB LCD).
Chip select signals LCD_MAIN_CS can enable LCD. BACKLIGHT signal enables white LED of main LCD.
"RESET_2V8" signal initiates the reset process of the LCD.
200kHz offset
30 kHz bandwidth
400kHz offset
30 kHz bandwidth
600kHz ~ 1.8MHz offset
30 kHz bandwidth
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GSM
DCS
GSM
DCS
GSM
DCS
2-2
-35dBc
-35dBc
-66dBc
-65dBc
-75dBc
-68dBc