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Summary of Contents for ST M95040-125
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M95040-125 M95020-125 M95010-125 Automotive 4-Kbit, 2-Kbit and 1-Kbit SPI bus EEPROM Features ■ Compatible with the Serial Peripheral Interface (SPI) bus ■ Memory array – 1 Kbit, 2 Kbit or 4 Kbit of EEPROM SO8 (MN) – Page size: 16 bytes 150 mil width –...
Description M95040-125, M95020-125, M95010-125 Description The M950x0-125 devices are 1-Kbit, 2-Kbit and 4-Kbit Electrically Erasable PROgrammable Memories (EEPROM) accessed through the SPI bus, synchronized with a clock running up to 5 MHz. The devices can operate with supply voltages ranging from 2.5 V to 5.5 V.
M95040-125, M95020-125, M95010-125 Description Table 1. Signal names Signal name Function Serial Clock Serial Data input Serial Data output Chip Select Write Protect HOLD Hold Supply voltage Ground Doc ID 022545 Rev 1 7/36...
Signal description M95040-125, M95020-125, M95010-125 Signal description During all operations, V must be held stable and within the specified valid range: (min) to V (max). All of the input and output signals can be held high or low (according to voltages of V...
M95040-125, M95020-125, M95010-125 Signal description Write Protect (W) This input signal is used to control whether the memory is write protected. When Write Protect (W) is held low, writes to the memory are disabled, but other operations remain enabled. Write Protect (W) must either be driven high or low, but must not be left floating.
Signal description M95040-125, M95020-125, M95010-125 2.9.3 Power-up conditions When the power supply is turned on, V rises continuously from V to V . During this time, the Chip Select (S) line is not allowed to float but should follow the V voltage.
M95040-125, M95020-125, M95010-125 Connecting to the SPI bus Connecting to the SPI bus These devices are fully compatible with the SPI protocol. All instructions, addresses and input data bytes are shifted in to the device, most significant bit first. The Serial Data Input (D) is sampled on the first rising edge of the Serial Clock (C) after Chip Select (S) goes low.
Connecting to the SPI bus M95040-125, M95020-125, M95010-125 SPI modes These devices can be driven by a microcontroller with its SPI peripheral running in either of the two following modes: ● CPOL=0, CPHA=0 ● CPOL=1, CPHA=1 For these two modes, input data is latched in on the rising edge of Serial Clock (C), and output data is available from the falling edge of Serial Clock (C).
M95040-125, M95020-125, M95010-125 Operating features Operating features Hold condition The Hold (HOLD) signal is used to pause any serial communications with the device without resetting the clocking sequence. During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data Input (D) and Serial Clock (C) are Don’t Care.
Operating features M95040-125, M95020-125, M95010-125 Data protection and protocol control To help protect the device from data corruption in noisy or poorly controlled environments, a number of safety features have been built in to the device. The main security measures can be summarized as follows: ●...
M95040-125, M95020-125, M95010-125 Memory organization Memory organization The memory is organized as shown in Figure Figure 6. Block diagram HOLD High voltage Control logic generator I/O shift register Address register Data and counter register Status Register Size of the read-only...
Write to Memory Array 0000 A 1. X = Don’t Care. 2. A8 = 1 for the upper half of the memory array of the M95040-125, and 0 for the lower half, and is Don’t Care for other devices. Write Enable (WREN) The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
M95040-125, M95020-125, M95010-125 Instructions Write Disable (WRDI) One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown in Figure 8, to send this instruction to the device, Chip Select (S) is driven low, and the bits of the instruction byte are shifted in, on Serial Data Input (D).
Instructions M95040-125, M95020-125, M95010-125 Read Status Register (RDSR) One of the major uses of this instruction is to allow the MCU to poll the state of the Write In Progress (WIP) bit. This is needed because the device will not accept further WRITE or WRSR instructions when the previous Write cycle is not yet finished.
M95040-125, M95020-125, M95010-125 Instructions Figure 9. Read Status Register (RDSR) sequence 9 10 11 12 13 14 15 Instruction Status Register Out Status Register Out High Impedance AI01444D Doc ID 022545 Rev 1 19/36...
Instructions M95040-125, M95020-125, M95010-125 Write Status Register (WRSR) The Write Status Register (WRSR) instruction allows new values to be written to the Status register. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. The Write Status Register (WRSR) instruction is entered by driving Chip Select (S) low, sending the instruction code followed by the data byte on Serial Data input (D), and driving the Chip Select (S) signal high.
M95040-125, M95020-125, M95010-125 Instructions Read from Memory Array (READ) As shown in Figure 11, to send this instruction to the device, Chip Select (S) is first driven low. The bits of the instruction byte and address byte are then shifted in, on Serial Data Input (D).
Instructions M95040-125, M95020-125, M95010-125 Write to Memory Array (WRITE) As shown in Figure 12, to send this instruction to the device, Chip Select (S) is first driven low. The bits of the instruction byte, address byte, and at least one data byte are then shifted in, on Serial Data input (D).
Power-up and delivery states M95040-125, M95020-125, M95010-125 Power-up and delivery states Power-up state After power-up, the device is in the following state: ● low power Standby Power mode ● deselected (after Power-up, a falling edge is required on Chip Select (S) before any instructions can be started).
–0.50 Electrostatic pulse (Human Body Model) voltage 4000 1. Compliant with JEDEC Std J-STD-020 (for small body, Sn-Pb or Pb assembly), with the ST ECOPACK® 7191395 specification, and with the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU. 2. Positive and negative pulses applied on pin pairs, according to the AEC-Q100-002 (compliant with JEDEC Std JESD22-A114, C1=100pF, R1=1500Ω, R2=500Ω)
DC and AC parameters M95040-125, M95020-125, M95010-125 DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristic tables that follow are derived from tests performed under the measurement conditions summarized in the relevant tables.
M95040-125, M95020-125, M95010-125 DC and AC parameters Table 10. Capacitance Symbol Parameter Test condition Min. Max. Unit Output capacitance (Q) = 0 V Input capacitance (D) = 0 V Input capacitance (other pins) = 0 V 1. Sampled only, not 100% tested, at T =25°C and a frequency of 5 MHz.
DC and AC parameters M95040-125, M95020-125, M95010-125 Table 13. AC characteristics (M950x0, device grade 3) Test conditions specified in Table 9 Table 7 Symbol Alt. Parameter Min. Max. Unit Clock frequency D.C. S active setup time SLCH CSS1 S not active setup time...
M95040-125, M95020-125, M95010-125 DC and AC parameters Table 14. AC characteristics (M950x0-W, device grade 3) Test conditions specified in Table 9 Table 8 Symbol Alt. Parameter Min. Max. Unit Clock frequency D.C. S active setup time SLCH CSS1 S not active setup time...
DC and AC parameters M95040-125, M95020-125, M95010-125 Figure 15. Serial input timing tSHSL tCHSL tSLCH tCHSH tSHCH tDVCH tCHCL tCLCH tCHDX MSB IN LSB IN High impedance AI01447d Figure 16. Hold timing tHLCH tCLHL tHHCH tCLHH tHLQZ tHHQV HOLD AI01448c...
M95040-125, M95020-125, M95010-125 DC and AC parameters Figure 17. Serial output timing tSHSL tCLQV tCLCH tCHCL tSHQZ tCLQX tQLQH tQHQL ADDR LSB IN AI01449f Doc ID 022545 Rev 1 31/36...
Package mechanical data M95040-125, M95020-125, M95010-125 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com.
P = RoHS compliant and halogen-free (ECOPACK Process /S = Manufacturing technology code For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact your nearest ST sales office. 34/36 Doc ID 022545 Rev 1...
M95040-125, M95020-125, M95010-125 Revision history Revision history Table 18. Document revision history Date Version Changes 02-Jan-2012 Initial release. Doc ID 022545 Rev 1 35/36...
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