Yamaha AO8 Service Manual page 29

AO8
3-1. AO8 - Slot [Initial] Test
Checks slot operation by checking the minimum necessary number of pins.
3-1. AO8-SLOT [Initial] Test OK
* Address Bus Test 00000000
OK
* Data Bus Test 00000000
OK
* Voltage Check 00000000
OK
+20V 00000000
+15V 00000000
-15V 00000000
+5V 00000000
-5V 00000000
* /CON Line Test 00000000
OK
Basically, the same as up till here
3-2. AO8 - Slot [Clock Line] Test
This test checks around the slot clock.
3-2. AO8-SLOT [Clock Line] Test OK
* FS Line Check
OK
Fs 00000000
64Fs 00000000
256Fs 00000000
3-3. AO8 - Slot [Data Line] Test
This test checks around the serial communications.
3-3. AO8-SLOT [Data Line] Test OK
* Digital Signal line Test
SI 00000000
25
The results for each slot are displayed in order from the left. A mark is made
for each check to show the progress of the checks.
(Blank: Not yet checked; 0: Normal; 1: Abnormal; N: No response)
3-1. AO8-SLOT [Initial] Test
Address Bus Test:
Data Bus Test:
Voltage Check:
/CON Line Test:
First, all the voltages for one slot are
checked, then this is repeated for the
next slot. (The notation is each
voltage [x 8 slots], but the check
order is each slot [x all voltages].)
3-2. AO8-SLOT [Clock Line] Test
FS Line Check:
Basically, the same as up till here
3-3. AO8-SLOT [Data Line] Test
OK
Digital Signal Line Test:
Basically, the same as up till here
The switching of Digital Line by
the LMY-SLOT inspection jig
and ID conversion jig will be
inspected automatically.
NG example
3-1. AO8-SLOT [Initial] Test
* Address Bus Test 00000100
* Data Bus Test 00010100
OK
OK * Voltage Check 00010100
OK
+20V 00010000
OK
+15V 00010000
-15V 00000000
+5V 00000000
-5V 00000100
* /CON Line Test 00010100
Now Checking ...
/CON Line Test
NG example
3-2. AO8-SLOT [Clock Line] Test
* FS Line Check
Fs 00010000
OK
64Fs 00010000
256Fs 00010100
Now Checking ...
FS Check 256Fs
NG sample
Please refer to page 24 for NG charts.
OK
Stopped the moment an actual Addr.BusTest
or DataBusTest NG appears.
Displays which pin
number is NG. The main
part of the address bus is
displayed. (1: NG; 0: OK)
3-1. AO8-SLOT [Initial] Test
NG
NG
Address Bus Test:
SLOT6 111 1111111-
NG
Data Bus Test:
SLOT4 11111111 11111111
SLOT6 11111111 11111111
Voltage Check:
SLOT4
+20V => +xx.xxV (-xx.x%)
+15V => +xx.xxV (+xx.x%)
NG SLOT6
-5V => +xx.xxV (-xx.x%)
/CON Line Test: 00010100
The detected voltage is displayed and the
percentage deviation from the ideal state
is displayed. This is shown for each slot.
3-2. AO8-SLOT [Clock Line] Test
NG
FS Line Check:
SLOT4
Fs -> xx.xxx kHz (-xx.x%)
64Fs -> xx.xxx kHzX64 (+xx.x%)
256Fs -> xx.xxx kHzX256 (-xx.x%)
SLOT6
256Fs -> xx.xxx kHzX256 (-xx.x%)
The detected FS frequency is displayed
and the percentage deviation from the
ideal state is displayed.
The values for 64 Fs and 256 Fs are
displayed in such a way that they can be
easily grasped.
NG
NG
NG
NG
NG
NG
NG
NG
NG
NG
NG
NG