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Peritek VCT-V User Manual

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VCT-V, VCU-V, VCD-V
GRAPHICS BOARDS
USER'S MANUAL
Copyright (c) 1995 by
Peritek Corporation
5550 Redwood Road
Oakland, CA 94619
(510) 531-6500
FAX (510) 530-8563
email: support@peritek.com
Release 2.3
April 19, 1995
Applies to:
VCT-V FAB REV 4 and up
VCU-V FAB REV 4 and up
VCD-V FAB REV 2 and up

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Summary of Contents for Peritek VCT-V

  • Page 1 Peritek Corporation 5550 Redwood Road Oakland, CA 94619 (510) 531-6500 FAX (510) 530-8563 email: support@peritek.com Release 2.3 April 19, 1995 Applies to: VCT-V FAB REV 4 and up VCU-V FAB REV 4 and up VCD-V FAB REV 2 and up...
  • Page 2 Peritek...
  • Page 3 Peritek...

  • Page 4: Table Of Contents

    Figure 2-1 Example VMEbus Backplane ............2-6 2.3.4 What's Next? ......................2-7 2.3.5 Connecting the Mouse, Keyboard, and Console ..........2-8 2.3.6 Checking your Display..................2-9 Figure 2-2 Jumper Locations for the VCT-V and VCU-V ............2-10 Figure 2-3 Jumper Locations for the VCD-V................2-11 2.4 Option Selection........................2-12 2.4.1 CSR Addresses.....................2-12 2.4.2 Interrupt Grant Receive/Acknowledge..............2-13...
  • Page 5 Peritek...
  • Page 6 Peritek...
  • Page 7 2.4.9 BT482 Output Level (VCD-V/T - special order only).........2-18 2.4.10 Selecting PTERM Options.................2-19 2.4.11 Selecting Serial I/O Options................2-20 2.5 Connections to the VCU-V, VCT-V, and VCD-V ..............2-22 2.5.1 Console, Mouse, Trackball, and Keyboard Connectors ........2-23 2.5.1a Console.......................2-23 2.5.1b Mouse and Trackball..................2-24 2.5.1c Serial and PC Keyboards..................2-26...
  • Page 8 Line Buffer Decoding (IOREQ)..................4-8 34020 Host Interface Arbitrator..................4-9 VMEbus Block Mode ....................4-9 4.7 Display Memory........................4-9 VCD-V and VCU-V Pixel Size..................4-10 VCT-V Pixel Size ......................4-10 VCD-V Display Memory Size ..................4-10 VCU-V Display Memory Size ..................4-10 VCT-V Display Memory Size..................4-11 4.8 System Memory........................4-11 SIMM Sockets .......................4-11...
  • Page 9 5.5.3 VCD-V/A6/D8 Type ICS1562 Version Horizontal Zoom Register.....5-38 5.5.4 Horizontal Zoom Control Register (Non-ICS1562 VCD-V's) ......5-39 5.6 BT463 - Color Map Controller for the VCT-V ..............5-43 5.7 BT468 - Color Map Controller for the VCU-V..............5-47 5.8 BT459 - Color Map Controller for the VCD-V..............5-50 5.9 BT482 - Color Map Controller for the VCD-V..............5-53...
  • Page 10 Peritek...

  • Page 11: Introduction

    This manual provides information about how to configure, install, and program the Peritek 34020-based VMEbus graphics controllers. Products covered include the VCU-V ultra-high resolution controller, the VCT-V 24-bit true-color controller, and the VCD-V analog/digital controller. The boards can be covered in one manual because their feature set is largely the same, and the software is identical.

  • Page 12: Getting Help

    Peritek Getting Help This installation manual gives specific steps to take to install your Peritek graphics board. There are, however, variables specific to your computer configuration and monitor that this manual cannot address. Normally, the default values given in this manual will work. If you have trouble installing or configuring your system, first read Chapter 6, "Troubleshooting".

  • Page 13: Notices

    Peritek Corporation assumes no responsibility for the use or reliability of software or hardware that is not supplied by Peritek, or which has not been installed in accordance with this manual. PX Windows and Peritek are trademarks of Peritek Corporation. The...

  • Page 14: Conventions Used In This Manual

    Peritek Conventions Used In This Manual The following list summarizes the conventions used throughout this manual. Code Code fragments, file, directory or path names and fragments user/computer dialogs in the manual are presented in the courier typeface. Commands or Commands, or the names of executable programs, except program names those in code fragments, are in bold.

  • Page 15: Chapter 1 General Information

    Chapter 1 General Information 1.1 Introduction This chapter provides an overview of the VCT-V, VCD-V, and VCU-V graphics controllers. Additional sections contain a bibliography, specifications, monitor requirements, and common configurations. This is summary information, and is not critical to the one who wishes to press on to the installation procedures, which are contained in Chapter 2.

  • Page 16: Functional Description

    The boards are differentiated chiefly by the bits/pixel of the primary display memory and the video output sections. The VCD-V and VCU-V have 8 bits/pixel in the primary plane and the VCT-V has 24-bits. The VCU-V and VCT-V have only analog RGB outputs and the VCD-V offers both analog and digital.

  • Page 17: Special Features Of The Vcu-V

    Special Features of the VCT-V The VCT-V supports displays up to 1280 x 1024, has a true color (24-bit) primary screen, an optional 8-bit SCSI port, and up to four pages of 1280 x 1024 display. Programmable screen resolution ranges from 640 x 480 pixels up to 1280 x 1024 with refresh rates between 30 and 72 Hz vertical and 15.7 to 73 KHz horizontal refresh rates, non-interlaced or non-...

  • Page 18: Tms 34082 Floating Point Coprocessor

    Peritek The 34020 mediates all host accesses to display and processor memory and control registers through a byte addressable 32 bit interface port. Bus transceivers between the 34020 bus and VMEbus support D16 and D32 data transfers for the VMEbus.

  • Page 19: 34020 Processor Memory (Dram And Prom)

    256 colors out of a palette of 16.7 Million. A two bit cursor with a 64 x 64 x 2 bit map function is also included on chip. For the VCT-V, the display memory data is directed to the analog monitor via a Brooktree BT463 color map control chip which provides a programmable 24 bit wide color map (8 bits each red, green, and blue).

  • Page 20: Vmebus Interface

    16.7 Million. A two bit cursor with a 64 x 64 x 2 bit map function is also included. Additional color map entries are provided for the overlay screen and cursors. Contact Peritek for information on what panels are supported.

  • Page 21: Peripheral Support

    An 8242PC keyboard controller gives a PC-compatible keyboard port and a PS/2 mini-DIN connector is used. The VCU-V and VCT-V also have an optional 8 bit Small Computer Systems Interface (SCSI) peripheral port. All three designs can be supplied with a 32-bit High Speed Port (HSP) which allows 32-bit data to read or written directly by the 34020 to/from system or graphics memory.

  • Page 22: Additional References

    1.3 Additional References Peritek documentation includes User's Manuals, Graphics Subroutine Package Manual, and Peritek PX Windows Server Installation and User's Guide. Due to lack of demand, data sheet extracts are no longer included as Appendices to the manual. They are available upon request. The...

  • Page 23: General Specifications

    2 MB (total) of 32-bit wide permanent storage. A user jumper allows the board to auto-start from EPROM. Peritek can supply dumb terminal emulation (PTERM), Graphics Subroutine Package (CnP), and Peritek's PX Windows X11R6 server in PROM. Possible combinations are PTERM alone, CnP alone, PX Windows alone, or a combination of PTERM and either CnP or PX Windows.
  • Page 24 (last through first, respectively) screens. On the VCT-V, the display word size and pixel size is 32 bits. Bits 0-7 are Red, bits 8-15 are green, bits 16-23 are blue, bits 24-27 are overlay, bits 28-29 are for window type table, and bits 30-31 are read/write but not used.
  • Page 25 64 x 64 x 2 bitmapped cursor which does not work correctly with interlaced displays. VCT-V Color Map: The VCT-V output uses a Brooktree BT463 True Color RAMDAC for displays ranging from 640 x 480 interlaced up to better more than 1280 x 1024 non-interlaced. A...
  • Page 26 Connection is made via a mini-DIN PS/2 connector. SCSI Port: On the VCT-V and VCU-V an optional Small Computer Systems Interface (SCSI) peripheral port, using an NCR 5380 controller, supports up to 7 high speed (1 MB/second) 8-bit parallel intelligent devices. It allows any compatible device (such as a SCSI disk) to be used.
  • Page 27 CPU only supports A16/D16. Best performance results if the VMEbus address space supports D32 transfers. Contact Peritek if you need to use this mode. An optional direct A32 address mapping gives a 64 MB window into board memory. Except for PX Windows when used in a multi-processor environment, Peritek software does not use the A32 addressing feature.
  • Page 28 1, 4, and 8 bit monochrome and color panels have been tested and qualified. In the case of color panels, 9-bit panels such as the LQ10DH011 are connected 3 bits red, 3 bits green, and 2 bits blue. Contact Peritek about information regarding panel compatibility. Serial Connector: DB-9 connectors are provided for the console and mouse connectors.
  • Page 29 Peritek Standard Display Timing Specifications Display Vertical Horizontal Pixel Format Refresh Refresh Clock 640 x 480 60 Hz 31.5 KHz 27 MHz 1024 x 768 70 Hz 60 KHz 55 MHz 1024 x 1024 57 Hz 60 KHz 80 MHz...

  • Page 30: Monitor Requirements

    Peritek 1.5 Monitor Requirements Peritek graphics boards can be used with a wide variety of monitors. For best performance a monitor should have the following features:    Color RGB with composite sync on green analog video input  Switchable Termination (for monitor loopthrough) ...
  • Page 31 Format Size VCU-V/X12 1280 x 1024 8 + 4 VCU-V/X16 1600 x 1280 8 + 4 VCT-V/X12 1280 x 1024 24 + 4 VCD-V 640 x 480 8 + 4 /X6/XD8 Options: 640 x 480 display (1024 x 1024 addressable)

  • Page 32: Chapter 2 Installing Your Peritek Graphics Board

    Chapter 2 Installing Your Peritek Graphics Board 2.1 Introduction There are 2 steps involved in getting your Peritek Graphics board to work in your system:  Unpack and install the Peritek graphics board.  Install the software This chapter shows you how to install the Peritek graphics board in your computer.

  • Page 33: Unpacking Your Board

    When you unpack your board, inspect the contents to see if any damage occurred in shipping. If there has been physical damage, file a claim with the carrier at once and contact Peritek for information regarding repair or replacement. Do not attempt to use damaged equipment.

  • Page 34: Vmebus Installation

    Peritek 2.3 VMEbus Installation Before installing the board in the backplane, you must confirm that the addresses used by the Peritek graphics board are not used by other devices in your computer. Caution Only use software designed for your CPU. Do not, for example, use software designed for a 68030 on a 68040.

  • Page 35: Checking Board Addresses

    The xxxx is a place holder for digits that are processor specific. Some common values are shown in Table 2-2. Full memory settings are only used in multiple Peritek board configurations. The y in the line buffer address is a placeholder for a digit which is processor specific. The table on the following page gives you values for xxxx and y for some common CPUs.

  • Page 36: Installing The Graphics Board

    A16/D32 Sun, HP 0000 These addresses are the defaults used by Peritek. Only the Control Register address is set by jumpers on the graphics board. The Line Buffer and Full Memory addresses and the Interrupt Vector are software configurable. 2.3.3 Installing the Graphics Board Use the following procedure to install the Peritek graphics board into the VMEbus backplane.

  • Page 37: Figure 2-1 Example Vmebus Backplane

    Note Note: There must not be any open slots between the first and last boards which use either DMA or interrupts (this includes the Peritek graphics board, which uses interrupts). The shorting jumper for Slot 2 IAKIN/OUT should be removed (assuming the graphics board is installed in that slot).

  • Page 38: What's Next

    Now at this point you can continue to the next section, 2.3.5 Connecting the Mouse, Keyboard, and Console, or if you are not using them, skip it and go on to the following section, 2.3.6 Checking your Display. Installing Your Peritek Graphics Board 2-7...

  • Page 39: Connecting The Mouse, Keyboard, And Console

    This section applies only to applications which use a mouse (or trackball) and keyboard. Plug in the mouse and the keyboard cables. Note If you have an older style Peritek board, it will have a 20-pin header which accepts a ribbon connector instead of separate keyboard, mouse and terminal connectors.

  • Page 40: Checking Your Display

    If you encounter display problems with PTERM, the timing parameters may need to be changed. However, are not user definable; they are hard-coded into the PROM. Contact Peritek for a different PROM set to set the correct display timings for your installation.

  • Page 41: Figure 2-2 Jumper Locations For The Vct-V And Vcu-V

    Peritek Figure 2-2 Jumper Locations for the VCT-V and VCU-V 2-10 Installing Your Peritek Graphics Board...

  • Page 42: Figure 2-3 Jumper Locations For The Vcd-V

    Peritek Figure 2-3 Jumper Locations for the VCD-V Installing Your Peritek Graphics Board 2-11...

  • Page 43: Option Selection

    FPGA, color map, cursor, and memory configuration. The following instructions tell how to modify the VCD-V FAB REV 2 (and on) and the VCU-V and VCT-V FAB REV 4 (and on) to a non- standard configuration. Refer to Figure 2-3 Jumper Option Locations for VCD and VCT/VCU (previous two pages) for jumper locations.

  • Page 44: Interrupt Grant Receive/Acknowledge

    Three jumpers set this response level. Refer to the Jumper Location Figures for VCD and VCT/VCU and Figure 2-4 (above) for the location of the jumpers. In the table below, 0 equals jumper installed. Installing Your Peritek Graphics Board 2-13...

  • Page 45: Interrupt Priority

    J1 (VME P1 connector) and is labeled JP1. The pin layout is as follows: Figure 2-5 Interrupt Priority Jumpers IRQ7 IRQ3 IRQ6 IRQ2 IRQ5 IRQ1 IRQ4 Caution The Vector Priority setting must match the Interrupt Request Priority setting. 2-14 Installing Your Peritek Graphics Board...

  • Page 46: Flash Eeprom

    200nS. By virtue of the pin and address arrangement on these devices no size jumpers are required. Peritek has a program which is available upon request which can be used to load images into the the EEPROMs. In order to allow the devices to program, a jumper must be installed on the board to enable 12 Volts to the EEPROMs (see below).

  • Page 47: Dram And Vram Size

    On the VCD-V, the jumpers are part of jumper strip JP5. Figure 2-6 VCD-V DRAM and VRAM Size and Autoboot Enable resv resv On the VCT-V and VCU-V, the jumpers are part of jumper strip JP19: Figure 2-7 VCT/VCU DRAM and VRAM Size Lower edge of U27 - MACH230 resv The tables on the next page shows how to set the DRAM and VRAM jumpers.

  • Page 48: Master Pixel Clock Oscillator Frequency

    170 MHz to take advantage of this. The VCT-V uses either the ICS1562 or the ICS1572 (in some special configurations). The ICS1572 has a 150 MHz maximum clock frequency, which is more than what the BT463 color map chip is limited to (135 MHz).

  • Page 49: Interlaced Operation And Vcu-V Slow Mode

    If this presents a problem, please contact the factory. Routines provided in Peritek's Graphics Subroutine Package and PX Windows software are used to set the pixel clock. Please contact Peritek if you require assistance in selecting a correct table from those distributed with the software.

  • Page 50: Selecting Pterm Options

    The RTS signal will control output from PTERM to the host. If this signal is not connected the UART will refrain from sending characters to the host. Figure 2-8 VCD-V PTERM Serial Jumpers (JP33) RP20 RP23 RP15 Installing Your Peritek Graphics Board 2-19...

  • Page 51: Selecting Serial I/O Options

    Peritek Figure 2-9 VCT-V and VCU-V PTERM Serial Jumpers (JP22) RP22 RP17 2.4.11 Selecting Serial I/O Options Section 2.5.1 has connector pinouts for the Serial I/O ports. In the follwoing tables, CnP Port refers to the way the Graphics Subroutine Package uses these ports.
  • Page 52 Table 2-10 Extra Port or CnP Port 3 (DUART 1 channel B) No connector is supplied for this port, but the signals can be output from the Console Port with option jumpering. See Console Port Options, above. Installing Your Peritek Graphics Board 2-21...

  • Page 53: Connections To The Vcu-V, Vct-V, And Vcd-V

    Peritek 2.5 Connections to the VCU-V, VCT-V, and VCD-V With the introduction of the VCU-V and VCT-V FAB REV 4 and the VCD-V FAB REV 2, the connector layout has been completely revamped in the interest of providing a more "user friendly" front panel. The mouse...

  • Page 54: Console, Mouse, Trackball, And Keyboard Connectors

    Sample programs exist which process keyboard and mouse inputs, but no "intelligent" keyboard or mouse software is available. That is why we have PX Windows! Peritek can supply cables and devices - please contact the factory for ordering information. 2.5.1a Console The console port is used in conjunction with the PTERM terminal emulator, and allows the graphics board to function as a "dumb terminal".

  • Page 55: Mouse And Trackball

    The console port is suitable for applications which require long cables, because it uses the RS-232C electrical protocol which can support cable lengths well in excess of 100 feet. Peritek uses a DB9 female D-Sub connector. Table 2-11 Console Connector Pinout...
  • Page 56 Both Peritek Mouse units are suitable for applications which require long cables, because they use the RS-232C electrical protocol which can support cable lengths well in excess of 100 feet. Peritek uses a DB9 male D-Sub connector to pass data and power to the mouse, which requires +12 and -12.

  • Page 57: Serial And Pc Keyboards

    2.5.1c Serial and PC Keyboards Peritek Serial Keyboard The Peritek Serial Keyboard is a DEC LK401-AA unit which is especially suited for applications which require long cables. The Serial Keyboard uses the RS-232C protocol which can support cable lengths in excess of 100 feet.

  • Page 58: Video Connector

    You must use the correct initialization table, since a VGA monitor depends on the sync polarities to determine operating frequency. If you use the Peritek VGA-3/20 VGA to BNC cable, only composite signals are carried to the monitor, and it will "autoscan", if the monitor is so equipped.

  • Page 59: High Speed Data Port (Hsp)

    VCD output 74F14/LS244 74ACT244 active low VCD output 74F14/LS244 74ACT244 PRDYL active low VCD input 74LS244 74F14/LS244 GND A17, A25, A26, A27, C17, C18, C19, C20, C24, B2, B12, B22, B31 VCC B1, B13, B32 2-28 Installing Your Peritek Graphics Board...

  • Page 60: 8-Bit Scsi Port (Vct-V And Vcu-V)

    Peritek 2.5.4 8-bit SCSI Port (VCT-V and VCU-V) For its optional SCSI port, Peritek follows the "standard" 8-bit SCSI pinout on the VMEbus P2 connector popularized by Motorola. P2 is a 96 pin header (3 rows x 32 pins), with the B, or center row reserved for use by the VMEbus address and data buses.

  • Page 61: Digital Video Connector (Vcd-V Only)

    In addition, some panels require controlled power sequencing. It has been Peritek's experience that if the panel and the graphics board are powered on and off simultaneously that additional sequence control is not required.
  • Page 62 RGB Input Values Color R0 R1 R2 G0 G1 G2 B1 B0/B2 Black Blue Green Light Blue 0 Purple Yellow White Red Scale (darker) (brightest) Green Scale 0 (darker) (brightest) Blue Scale 0 (darker) (brightest) Installing Your Peritek Graphics Board 2-31...
  • Page 63 --> logic off --> +5 off Panel Model Logic/Power Connector Power Connector(s) LQ10D011 Hirose DF11-22DS-2C Molex 51005-0800 (backlight) LQ10DH11 Hirose DF11-22DS-2C Molex 51005-0800 (backlight) LQ10DH15 Hirose DF11-22DS-2C Molex 51005-0800 (backlight) LQ10D021 Hirose DF13-15S-1.25C Hirose DF13-6S-1.25C (logic) S2B-EH (backlight) 2-32 Installing Your Peritek Graphics Board...
  • Page 64 -- use direct power supply connection -- 2,4,6,8 Ground Ground Ground Ground 16,18,20,22,24 Ground Power Supply +5 volts A12,B12 +24 volts A11,B11 Ground A10,B10 Logic/power connector is a standard dual row standard .1" connector Installing Your Peritek Graphics Board 2-33...

  • Page 65: Chapter 3 Software Summary

    Software Product Descriptions and complete Technical Manual sets for the PX Windows and Graphics Subroutine Package products. Peritek provides software for the VCU-V, VCT-V, and VCD-V including Peritek PX Windows (X11R6 X Windows Server), 34020 Compiler Tools, Peritek simple console Terminal emulator (PTERM), and a comprehensive Graphics Subroutine Package (generically CnP).

  • Page 66: Software Availability By Platform And Os

    Peritek 3.2 Software Availability by Platform and OS Table 3-1 Peritek Software and Operating Systems Support Operating Current OS Subroutine System Version CPU Type PX Windows Package HPUX PA/RISC LynxOS OSF/1 Alpha pSOSystem R3000 Solaris SPARC SunOS 4.1.3 SPARC Unix/V68...

  • Page 67: Write Posting

    In the case of sequential accesses to the VMEbus, which the Peritek baords use, it can happen that the a write of the Peritek graphics board Line Buffer can occur before a write to the Line Address Register (LAR) has been completed.

  • Page 68: Px Windows Server

    Peritek supplies the hardware specific parts of the X Window System, which is the server. Peritek has written its own highly optimized graphics layer for the 34020. The software is broken up into 2 functional parts: the board-based X server and the CPU host side "stub program" which provides a communication link between the server, clients, and the CPU network and file system resources.

  • Page 69: Graphics Subroutine Package

    Peritek graphics controllers. It is called CDP for VCD- V, CUP for the VCU-V, and CTP for the VCT-V and is termed generically here as CnP. It is intended for the user who wishes to interface an application program directly to the board.
  • Page 70 Peritek Table 3-2 Graphics Subroutine Package Library Routines Initialization Functions clear_screen, new_screen, init_grafix, init_palet, init_screen, init_text, init_video, init_vuport 3D Transformation Functions copy_matrix, copy_vertex, init_matrix, perspec, rotate, scale, transform, translate, vertex_to_point Text Output Functions draw_char, draw_string Text Attribute Functions add_text_space, char_high,...
  • Page 71 Peritek Table 3-2 Graphics Subroutine Package Library Routines (continued) Graphics Attribute Functions gets_patn_max, gets_pmask, gets_ppop, gets_psize, gets_transp, install_patn, select_patn, set_color0, set_color1, set_pensize, set_pmask, set_ppop, transp_off, transp_on, cmmw_command, cmmw_readmask Color Palette Functions cmmr_command, cmmr_readmask, hls_rgb, rgb_hls, rgbrd, rgbwrt, cmmrblk, cmmwblk, hlsrd, hlswrt...

  • Page 72: Pterm Terminal Emulator

    Peritek 3.6 PTERM Terminal Emulator Peritek has written a terminal emulator for use as a simple interface where a console terminal is not available. It is not a VT100 emulator and doesn't support escape sequences - its functionality is at the level known as "dumb terminal emulator".

  • Page 73: Software Development Package

    Peritek 3.7 Software Development Package A SunOS-based C compiler, cross-assembler, and linker for user written 34020 applications is available from Peritek. Its general characteristics are described below. Contact Peritek for availability. Figure 3-1 Software Development Flow C source files C compiler...

  • Page 74: Features Of The 34020 Development Tools

    Peritek Features of the 34020 Development Tools * Standard Kernighan and Ritchie C Compiler with extensions - compiles standard C programs as defined by The C Programming Languge. This is a full-featured optimizing compiler, using advanced techniques for generating efficient, compact assembly code. The compiler supports these standard extensions: enumeration types, structure assignments, passing structures to functions, and returning structures from functions.

  • Page 75: Ancillary Programs

    ASCII files. A list of tables is provided in Section 5.4. Both PX Windows and CnP are distributed with a host of tables appropriate for a wide variety of applications. Please contact Peritek if you have difficulty selecting a table or getting a good display.

  • Page 76: Vcnvint

    A number of standard initialization tables are supported and are supplied. See Section 5.4 for more information. 3.8.4 VCnVTST Note: Contact Peritek for availability of this program. Supported only on VxWorks. Purpose: To test the control registers, interrupts, TMS34020 Graphics System Processor chip (CnP), the primary and overlay graphics display memory, 34020 system RAM, DUARTs, cursors, and color map chips.
  • Page 77 Peritek explanatory. However, instructions are included in Peritek's TMS34020 Software Manual. VCnVTST thoroughly tests the registers and RAM sections on the board. Bad results in some tests will prevent other tests from being run. A bad LAR, for instance, will prevent execution of the RAM diagnostics.

  • Page 78: Vcnvld

    VCnVTST has command line options similar to VCnVINT. Please refer to the Peritek TMS34020 Software Manual for a description. 3.8.5 VCnVLD Description: VCnVLD is used to load premade 34020 tasks to be loaded into the graphics board and executed.

  • Page 79: Vcnvoff

    Peritek 3.8.9 VCnVOFF Purpose: Clears the MEMON bit in the VCnV CSR register. Normally this is not necessary, since all host programs clear this bit on termination. However, if the program did not finish normally, it may be necessary to run this program (especially if you have boards which share the same line buffer addresses).

  • Page 80: Chapter 4 Theory Of Operation

    Chapter 4 Theory of Operation 4.1 Introduction This chapter contains a somewhat detailed look at the proprietary parts of the graphics board design. Standard devices, such as color map chips and DUARTs are not covered here. Chapter 5 has some relevant information about the devices.

  • Page 81: System Architecture

    The most significant differences arise out of the variety of display output options: 24 bit true color for the VCT-V, 8 bit color for the VCU-V and VCD-V, and digital output for the VCD-V. Referring to the...

  • Page 82: 34020/Vmebus Host Interface

    Peritek supports only the A16 and A24 space addressing modes except for multi- processor arbitration on Sun and Motorola 188 systems. The on-board interrupt controller supports an interrupt from the 34020 to the VMEbus host. Interrupt level is jumper selectable.

  • Page 83: Graphics Board Clock Sources

    (24.576 to 110 MHz). Phase Locked Loop (PLL) Clock The VCT-V, VCU-V, and some versions of the VCD-V incorporate a programmable pixel clock oscillator (ICS1562-201AM) which allows the user to program virtually any frequency pixel clock up to more than 200 MHz.

  • Page 84: 34020 Video And Processor Clock Synchronization

    XMEMON comes up off on power-up, and prevents the graphics board from responding to A32 addresses until it is turned on. This may be never, since Peritek software doesn't use extended addressing except in multiprocessing Sun and Motorola PX Windows systems.

  • Page 85: Data Bus Transceivers And The Byte Swapper

    Peritek When [(IOREQ*MEMON) + CSRREQ + (BFREQ*XMEMON)*!IACK] * AS * DSn = 1 [where + means logical OR, and * means logical AND] then, VREQ is set. It can be assumed that a valid address has been clocked into the address register and data is already set up on the VMEbus (for write) or the CPU is waiting to receive data from the board (read).

  • Page 86: Vmebus Interrupt Controller

    Peritek 4.5 VMEbus Interrupt Controller The interrupt controller FPLA is a D08 RORA (Release On Register Access) interrupter. It may be used with a D08 interrupt handler, which is the most common interrupter type, and includes CPUs that use the "VIC068"...

  • Page 87: Control Register Decoding (Csrreq)

    Peritek chips, PC Keyboard controller, zoom control register, and for the VCD-V, the digital lookup table). Although the VMEbus can access the 34020 side devices, the 34020 cannot access the CSR group. Separate device address decoders are therefore required to select the 34020 devices. Note that because they are all on the 34020 "side"...

  • Page 88: 34020 Host Interface Arbitrator

    Peritek 34020 Host Interface Arbitrator When the arbitrator receives the request from the VMEbus, it asserts the 34020 control lines (HCS, HWR, HRD) and waits until the 34020 responds, typically within 100 ns. If data is being read from the 34020 side, then that data is loaded into the VMEbus/34020 32-bit bus transceivers when the 34020 responds.

  • Page 89: Vcd-V And Vcu-V Pixel Size

    VCT-V Pixel Size On the VCT-V, pixel memory size is 24 bits for primary and 8 bits for overlay. The overlay actually only uses the low 4 bits because that is all the color map will use. The primary and overlay share the same address space: the primary uses the low 24 bits of each word, and the overlay uses the top 8 bits.

  • Page 90: Vct-V Display Memory Size

    Peritek VCT-V Display Memory Size For a VCT-V with a 1280 x 1024 display, the minimum video memory is a 8 MB of byte-addressable memory, expandable to 16 MB. Each 32-bit 34020 longword is a pixel position, where bits 0-23 are primary and bits 24-31 are overlay.

  • Page 91: Programmed Logic Devices

    Peritek 4.9 Programmed Logic Devices Virtually all logic on the graphics board is contained in commercial parts such the 34020, bus buffers, and programmed parts. The board uses numerous Programmed Logic Devices (PLDs). This section will briefly describe each part used and then outline the functions implemented by them.
  • Page 92 Peritek Table 4-1 VCT, VCU, VCD Common PLD Device Summary Part Device Number Type Description VCDTU1 MACH230 Provides LRDY and BUSFLT to 34020. Supplies address decoders for color maps, cursors, HSP, zoom register, PC Keyboard, serial I/O, SCSI (VCT/VCU only), and DLUT and pixel mux (VCD only).
  • Page 93 Peritek Table 4-2 VCT, VCU, VCD Unique PLD Device Summary Part Device Number Type Description VCTUV19 MACH210 Used for VCT and VCU. Zoom control register. Provides ICS1562 3-wire control interface. Provides programmable polarity for HSYNC and VSYNC. Supports external sync/genlock function. Controls blanking, VRAM shift clocks, and VCLK.
  • Page 94 Peritek Figure 4-1 VCD-V Block Diagram Theory of Operation 4-15...
  • Page 95 Peritek Figure 4-2 VCU-V Block Diagram 4-16 Theory of Operation...
  • Page 96 Peritek Figure 4-3 VCT-V Block Diagram Theory of Operation 4-17...

  • Page 97: Chapter 5 Programming On-Board Devices And Memories

    Devices and Memories 5.1 Introduction As with the other chapters, this one covers the VCT-V, VCU-V, and VCD-V. Most of the features are common, so the number of exceptions does not get out of control. In the interest of reducing superfluous information, and operating on the assumption that most users have either PX Windows or CnP, this chapter has undergone some heavy duty editing.
  • Page 98 BT482 Lookup Table (VCD-V Low Resolution Analog LUT) 5.10 Digital Lookup Table (VCD-V DLUT) 5.11 Hardware Cursors 5.12 2681 Serial I/O Ports (DUART) 5.13 5380 SCSI Port (VCT-V and VCU-V) 5.14 8242PC PC Keyboard Controller 5.15 High Speed Port (HSP) 5.16 Interrupts 5.17...

  • Page 99: Vmebus And Control Registers

    Section 2.4.1. For linear address access to the entire board, it can also respond to a 64 MB byte-addressable section of the 32-bit VMEbus memory map, Contact Peritek for assistance in determining when it is appropriate to use A32 space.

  • Page 100: Control/Status Register (Csr)

    Peritek The CSR group consists of 4 registers: Relative Register Section Offset Mnemonic Description Reference General Control 5.2.1 Line Address Register 5.2.2 XARADR A32 Address Match Register 5.2.3 DBRADR A16/A24 Address Match Register 5.2.4 VECADR Interrupt Vector Address Register 5.2.5...
  • Page 101 Peritek Table 5-2 CSR Bit Definitions REVFLAG used by software to determine that this is a board with PC Keyboard and byte swapper capability. On older boards this bit was r/w. From VCT/VCU Rev 4 and VCD Rev 2 it reads back set.

  • Page 102: Line Address Register (Lar)

    Peritek 5.2.2 Line Address Register (LAR) The LAR selects a memory or device register group on the board and permits a 1K Byte segment to be accessed through the DBR. Fully configured, the board contains a number of programmable devices, each of which has between 2 and 16 control registers.
  • Page 103 Peritek Table 5-3 LAR Bit Definitions (continued) Video RAM VCT-V Memory Selected 4000-7FFF Graphics RAM - bits 0-23 are primary (RBG) true color memory, bits 24-29 are overlay and window type table, bits 30-31 are r/w but not used. 256 pixels for each LAR value. 1K x 1K pixels is 4 MB or 4096 LARs.

  • Page 104: A32 Address Map And The Xaradr Address Match Register

    VMEbus host to linearly access the board through a 64 MB block in A32 space. You can access all on-board devices and memory through this block. Except for PX Windows multiprocessor drivers, Peritek software does not use A32 access. In order for the A32 space on the board to respond the XARADR register must be set up with a valid address, the 34020 must be initialized, and CSR bit XMEMON must be set.

  • Page 105: A16/A24 Address Map And Dbradr Address Match Register

    The only reason for selecting A24 space is if your CPU doesn't support D32 (long word) accesses in A16 space. You will pay a small (10-20%) performance for running D16 only. Peritek software must be explicity told to use A24 space, because the A24EN bit in the CSR must be set. Note that the 4 register CSR block can only respond in A16 space.

  • Page 106: Vecadr Interrupt Vector Address Register

    Peritek Table 5-5 DBRADR Address Match Register A16/A24 VMEbus DBRADR Address Bit Data Bit Reset SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET SYSRESET 14-31 reads 0 Note When A1624SWAPEN is set, DBRADR 0, 1 are don't care.

  • Page 107: Vmebus Block Transfers (Blt)

    VMEbus Address Bit 5.2.7 VMEbus Block Transfers (BLT) As of VCD-V FAB REV 2 and VCT-V/VCU-V FAB REV 4, the BLT function has been changed and software which uses it must also be changed to continue to use it. The BLT data transfer now supports D32 only.
  • Page 108 0000 2C-2F WRITEMASK 5.3.2 The writemask register supports display memory bit plane write protection. BT463 (VCT-V) The high resolution color BT468 (VCU-V) map processes the primary BT459 (VCD-V) overlay, and cursor pixel data into 8-bit Red, Green with Sync, and Blue analog video outputs.
  • Page 109 Peritek Table 5-7 VMEbus Side Device Buffer (continued) Selected Relative by LAR Address Device Section Function 103-13F DUART A 5.12 The 2681 Dual 143-17F DUART B Asynchronous Receiver Transmitters (DUARTs) provide RS-232 ports for LK401-type keyboard, mouse or trackball, and console, etc.

  • Page 110: Tms 34020 Graphics Systems Processor

    Peritek 5.3 TMS 34020 Graphics Systems Processor The Texas Instruments 34020 Graphics System Processor (GSP) is a general-purpose, 32-bit programmable processor with specialized graphics instructions and a 512 byte LRU instruction cache. It includes a full set of video timing control registers. The 34020 has a 32-bit processor...

  • Page 111: 34082 Floating Point Coprocessor

    Peritek User's Guide is a necessary adjunct to a comprehensive understanding of this device and can be ordered from TI or Peritek (see Section 1.2). Peritek offers in-depth software support, which is covered in Chapter 3. Note that the 34020 registers can be accessed as long words in D32 mode by the VMEbus (when the LAR=0), consistent with the register organization shown in the 34020 User's Guide.

  • Page 112: Vram Color Register And Block Fill Special Function

    Video RAMs (VRAMs) which support so-called VRAM special functions, which include block write and color register support. Peritek PX Windows software automatically detects and uses special functions if the board's VRAM can support them. The Color Register is used in conjunction with the VRAM block fill mode which allows up to 4 adjacent locations in the VRAM to be written in one cycle.

  • Page 113: Memory Types And Sizes

    Peritek 5.3.4 Memory Types and Sizes The board has a maximum of 8 MB (VCD-V) or 16 MB (VCT-V and VCU-V) of display memory and 32 MB of 34020 system memory capacity contained on field replaceable Single Inline Memory Modules (SIMMs).

  • Page 114: Vmebus And 34020 Byte Order Mapping

    (bytes 0 and 1) preceding the low order word (bytes 2 and 3) in memory, the reverse of the 34020. The TI cross assembler/compiler tools will supply the object code in big or little endian. The Peritek downloader and software are written for little endian. The VMEbus must use an odd address for byte access of 8-bit devices (color maps, cursors, DUART, DLUT).

  • Page 115: Example Code For Software Byte Swapping

    ;where primem is the memory. 5.3.5c The Hardware Byte Swapper Starting with the VCD-V FAB REV 2 and the VCT-V and VCU-V FAB REV 4 a hardware byte swapper has been included. Use of the swapper under PX Windows can give between 5 and 15% performance boost. The swap mode expands the address space and allow multiple mappings to the same physical memory.

  • Page 116: Virtual Memory, Page Faults, And Autoincrement Registers

    Peritek Swap Mode examples ABCD refers to 4 bytes 0-3 big endian or 3-0 little endian. Swap mode examples may be verified by writing in each mode and reading back in none mode or by writing in none mode and reading back in each mode.
  • Page 117 Peritek because while the VMEbus/LAR addressing can only access the 34020 memory at the top of 34020 address space, it can, in fact, be desirable to have 34020 programs execute starting at 34020 address 0. Therefore, the board address decoder permits system memory to appear in two places. As long as you write relocatable (position independent) code, you could even switch between the spaces dynamically.

  • Page 118: Sample Address Calculations

    Peritek Table 5-10 LAR/34020 Starting Address Table (continued) System Memory, referenced to the top of the 34020 address space Last Valid TMS34020 address high low System Memory 1 MB FC00 FF80 0000 4 MB F000 FE00 0000 8 MB E000...
  • Page 119 Peritek The DBRADR is a register containing the high 6 bits of the DBR A16 address (see Section 5.2.4). The actual VMEbus offset value = D offset = DBRADR*400h. Let us assume D offset = 8000 (DBRADR = 20). The board appears at the 32-bit address: A16 VMEbus + D offset, so we would get FFFF8000.
  • Page 120 0000- 2000- C400 0000- Flash EEPROM abcd 03FF 2FFF C5FF FFE0 100 0000 abcd 0000- 4000- C800 0000- VCT-V abcd 03FF 7FFF CFFF FFE0 1K x 1K x 32 Display Plane Four Pages 100 0000 abcd 0000- 4000- C800 0000-...
  • Page 121 VMEbus Byte TMS34020 Offset from Address DBRBase high Address Principal analog color map (BT459 - VCD-V, BT468 - VCU-V, BT463 - VCT-V) Address Register (low byte) C080 Address Register (high byte) C080 Data Buffer for control, cursor, overlay C080 Data Buffer for primary color palette...
  • Page 122 C080 m+3F For DUART A: m = 100, w = 8, x = 9 For DUART B: m = 140, w = A, x = B 5380 (SCSI, VCT-V and VCU-V option) SCSI Data In/Out C080 C00 Initiator Command Register...

  • Page 123: Initialization Tables

    13 (horizontal) and pin 14 (vertical) on the video connector for correct timing intervals. If you think that the table you are using is incorrect or you don't know which table to use please call Peritek. The following table summarizes the notation for board features.
  • Page 124 170 MHz The following two pages contain an actual Peritek timing table as generated by Peritek's in-house timing table program, VIDP. This table applies to the VCT-V/X12. It is included only for illustrative purposes. 5-28 Programming On-board Devices and Memories...
  • Page 125 Peritek Table 5-15 Example Initialization Table (1280 x 1024, 110 MHz) !Peritek-Initialization !Generated with the following command line options: ! bt VCT canned U/T-X12-1562 isvme y duarts 2 scsi y overlay y oldStyle n halt y overlay y scsi n ! 1024 lines * 1280 pixels, non-interlaced !1562 derived frequency of: 109.921745 MHz...
  • Page 126 "NumDuarts" "DlutSize" ! used on the VCD-V only "DlutCurs" ! used on the VCD-V only "HasScsi" ! used with VCT-V and VCU-V SCSI option "MovieMeg" ! used on the VCD-V only "MovieHigh" ! used on the VCD-V only "MovieWide" ! used on the VCD-V only...

  • Page 127: Application Note: Tweaking 34020 Initialization Parameters

    However, it may be that small adjustments are required. This section gives you some advice on how to do this. You can also supply Peritek with a filled-in copy of the monitor parameters sheet which follow this section. We can then provide you with a complete, correct calculated version.
  • Page 128 There are 3 ways to change the width (horizontal size) of the image. 1) Display more pixels. The aspect ratio remains the same. 2) Change the oscillator frequency. You will need to contact Peritek for advice and assistance. All the timing parameters will need to be recalculated.
  • Page 129 Declaration Peritek remains dedicated to making your application work. We can assist in creating special initialization tables for specific monitors and other output devices. If you need help it would be very useful if you can gather the data requested in the following form before calling us.

  • Page 130: Request For Timing Table

    Peritek Request for Timing Table Submit to: Peritek Corporation Attn: Ivor Bowden 5550 Redwood Road Oakland, CA 94619 USA TEL: (510) 531-6500 FAX: (510) 530-8563 email: ivor@peritek.com Company Information Company Name_______________________________ Contact______________________________________ Phone Number_____________________ Fax Number________________________ email______________________________ Monitor Information Monitor Brand____________________ Model Number__________________ Horizontal Timing Information Note: Horizontal timings may be given in pixel units (if given) or time units.

  • Page 131: Vertical And Horizontal Zoom

    VCD-V (non-ICS1562) versions - see the following page. A configuration tag accompanies the VCD-V which will tell you if your board uses the 1562. If you are unsure, contact Peritek for assistance. Programming On-board Devices and Memories 5-35...

  • Page 132: Ics1562 Type Horizontal Zoom Register

    Peritek 5.5.1 ICS1562 Type Horizontal Zoom Register All VCT-V and VCU-V and some versions of the VCD-V use the ICS1562 programmable phase-locked loop (PLL) pixel clock oscillator which is programmable to any frequency. This allows the hardware horizontal zoom circuit to be eliminated. To effect hardware horizontal zoom just reinitialize the timing registers and pixel clock.

  • Page 133: Vcd-V/A6 Type Ics1562 Version Horizontal Zoom Register

    0 or 1 Front porch adjust (see /MF for definition) Back porch adjust (see /MF for definition) Genlock mode. Contact Peritek before using. clear = internal sync set = external sync (genlock) Sync Mode...

  • Page 134: Vcd-V/A6/D8 Type Ics1562 Version Horizontal Zoom Register

    = sync is active high DAMODE Digital/Analog mode clear = digital display set = analog display 1562HOLD Bits 0-2 are used to program the ICS1562. 1562DATA Peritek's PX Windows and CnP Graphics 1562DCLK Subroutine Package support the 1562. 5-38 Programming On-board Devices and Memories...

  • Page 135: Horizontal Zoom Control Register (Non-Ics1562 Vcd-V's)

    Please note that this states the situation as of this writing, and additional configurations will be added as time goes on. Please contact Peritek if you find that the existing versions do not meet your need.
  • Page 136 Peritek Table 5-20 VCD-V Configuration Summary (non-ICS1562) VCD-V Lookup Model Display Table Typical Master Valid Option Type Type Oscillator(s) Zoom Factors /A12, /X12 Analog only BT459 integer, 1-16 /A10, /X10 Analog only BT459 80.64, 100 integer, 1-16 /X6, /A6 Analog only BT482 24.576, 27.00...
  • Page 137 Peritek Table 5-22 VCD-V/X12/D8 Analog/Digital Zoom Register Mnemonic Function 31-8 spare not used, not defined, reads 0 or 1 RJP12 Reads the state of jumper JP12. Reads 0 when jumper is installed. When used with EPROM- based VCDTE Terminal Emulator, JP12 installed causes VCD-V to be initialized for BT459/1280 x 1024 analog output.
  • Page 138 Peritek Table 5-24 VCD-V /MF Zoom Control Register (BT482 Analog and Digital) Mnemonic Function 31-8 spare not used, not defined, reads 0 or 1 CR0-CR2 Zoom control bits 0-2 Zoom Factor Back porch adjust Front porch adjust BP FP Function...

  • Page 139: Bt463 - Color Map Controller For The Vct-V

    ECL level dot clock and load clock for the BT463 and the VRAM shift clock. True color, which is what the VCT-V was really designed for, gives a full range (8 bits each Red, Green, and Blue) of color selection for each pixel, in other words, 16.7 million colors.
  • Page 140 Peritek BT463). Pseudo color is supported by the BT463, but not in Peritek's software. See the BT463 data sheet for more information. As mentioned above, the BT463 supports a 4-bit overlay. Pixel intersections between any of the planes results in a unique color, so that the pixels will still be visible.
  • Page 141 Peritek values are held in a temporary register inside the BT463 until the blue value is entered. BT463 registers include bit-mask (or read mask), allowing any combination of R, G, B and overlay bit(s) to be unconditionally masked off. Additonal registers include blink mask, allowing any of these same bit(s) to be blinked.
  • Page 142 Peritek Figure 5-2 BT463 Display Memory Bit Assignments BT463 True-color RAMDAC 2 BT431 bit-mapped ------> WT2-WT3, pixel 0-3 cursor controllers display data bits 28-29 ------- ------> WT0-WT1, pixel 0-3 Video Outputs 24-27 ------- ------> OL0-OL3, pixel 0-3 16-23 ------- ------>...

  • Page 143: Bt468 - Color Map Controller For The Vcu-V

    Note This section describes the features of the BT468. Some of these features are not directly used or supported in the Peritek PX Windows including overlays (but this will change with X11R6). On the VCU-V, the composite video output is generated by the Brooktree BT468 high performance monolithic color map/cursor controller.
  • Page 144 Peritek Table 5-27 BT468 registers VMEbus Offset Mnemonic Function CMAPARL Low byte of BT468 address register. Two bit low order internal counter addresses individual R, G, and B locations when color maps are accessed. (See description above). CMAPARH High byte of BT468 address register. See description above.
  • Page 145 Peritek Figure 5-3 BT468 Display Memory Bit Assignments display data BT468 RAMDAC bits overlay 56-59---- -----> Overlay Pixel 7 48-51---- -----> Overlay Pixel 6 40-43---- -----> Overlay Pixel 5 32-35---- -----> Overlay Pixel 4 24-27---- -----> Overlay Pixel 3 16-19---- ----->...

  • Page 146: Bt459 - Color Map Controller For The Vcd-V

    Note This section describes the features of the BT459. Some of these features are not directly used or supported in the Peritek PX Windows including overlays (but this will change with X11R6). On the high resolution VCD-V (e.g. VCD-V/X12), the composite video output is generated by the Brooktree BT459 high performance monolithic color map/cursor controller.
  • Page 147 Peritek As described in Section 4.2, on some versions of the VCD-V, instead of the GAL16V8 circuit described in the previous paragraph, an ICS1562 programmable pixel clock generator supplies pipeline reset, differential ECL level dot clock and load clock for the BT459 and the VRAM shift clock.
  • Page 148 Peritek The following table and block diagram show what color value you get depending on the various inputs to the color map (inputs are called Cursor Overlay, Graphics Overlay and Primary Screen). Table 5-30 BT459 Color Map Input Conversion Cursor...

  • Page 149: Bt482 - Color Map Controller For The Vcd-V

    Note This section describes the features of the BT482. Some of these features are not directly used or supported in the Peritek PX Windows including overlays (but this will change with X11R6). The BT482 color map/cursor controller is used in VCD-V configurations (e.g.
  • Page 150 Peritek The BT482 can be used as a three channel monochrome driver. In this situation, the programmer would load the R, G, and B lookup tables with identical data. Each of R, G, and B can independently drive a terminated monitor.
  • Page 151 Peritek Table 5-31 BT482 registers VMEbus Offset Mnemonic Function PRWADR Primary RGB triplet (0-255) write address register and cursor bitmap write address register. PRIPAL Primary color map palette. 256 x 3 (R,G,B) locations. R,G,B locations cycled by mod-3 counter. Cursor bitmap data buffer.
  • Page 152 Peritek The following table and block diagram show what color value you get depending on the various inputs to the color map (inputs are called Cursor Overlay, Graphics Overlay and Primary Screen). Table 5-32 BT482 Color Map Input Conversion Cursor...

  • Page 153: Vcd-V Digital Lookup Table (Dlut)

    Peritek 5.10 VCD-V Digital Lookup Table (DLUT) The Digital Look Up Table (DLUT) maps the 8-bit primary, 4-bit overlay, and 2-bit cursor data into unified 8-bit pixels. The data is made available on a 26-pin header along with sync, clock, and blanking (see Section 2.5 for connection information).
  • Page 154 (256*16) times. We have found that a very effective way to quickly load the table is to use the 34020 graphics FILL instruction. The CDP and PX Windows software available from Peritek both take advantage of this trick. In the tables shown on the next page, the term invalid indicates that the entry is not defined.
  • Page 155 Peritek Table 5-33 Case A DLUT Memory Map LAR Even Values LAR Odd 2 KB Ram Values Block 3-255 259-511 515-767 771-1023 3-1023 Primary 0-255 Cursor 0 Cursor 1 Cursor 0+1 Blanking Overlay 1 Cursor 0 Cursor 1 Cursor 0+1...
  • Page 156 Peritek Table 5-35 Case C DLUT Memory Map LAR Even Values LAR Odd 2 KB Ram Values Block 3-255 259-511 515-767 771-1023 3-1023 Primary 0-255 Cursor 0 Cursor 1 Cursor 0+1 Blanking Table 5-36 Case T DLUT Memory Map LAR Even Values...

  • Page 157: Hardware Cursors

    The BT482 has an internal control bit which can be set for interlaced mode which then makes it work correctly. External logic does the same thing for the BT431 cursors when used on the VCT-V. Unfortunately, nothing can be done for the BT459 and BT468 cursors, and so they really are unsuitable for interlaced displays.
  • Page 158 "tuning" of the A-D circuit. The BT482 cursor is mapped to the cursor 0 address. The Case 3 cursor, which is used on the VCT-V, implements a two-bit hardware cursor using two BT431 cursor controllers chips (see Section 5.11 for a functional description).
  • Page 159 Peritek Table 5-37 BT431 registers VMEbus Offset Cursors Selected Description BT431 cursors 0 & 1 Low byte address register (write only) BT431 cursors 0 & 1 High byte address register (write only) BT431 cursors 0 & 1 Bitmap RAM data buffer (write only) BT431 cursors 0 &...

  • Page 160: Serial I/O Ports (Duart)

    To obtain more understanding of the DUART and its many programmable functions, please refer to the 2681 data sheet available from the manufacturer (see Section 1.2 or contact Peritek) The DUART uses a 3.6864 MHz oscillator for its master clock. Each DUART has internal divider chains provide a full range of software programmable baud rates and timer periods.
  • Page 161 ASCII translation table because the LK401 is not ASCII (neither is a PC Keyboard). CnP "test programs" exist in the /Board/progs directory which can be used as examples for these tasks. Contact Peritek for more information. Table 5-38 DUART Initialization Table VMEbus...

  • Page 162: Scsi Port

    5.13 SCSI Port The Small Computer Systems Interface (SCSI) port is an optionally installed eight bit parallel interface designed to allow the VCT-V or VCU- V to communicate with other intelligent devices. The standard SCSI supports up to eight devices, which can be processors, disk controllers, etc.
  • Page 163 Peritek register called the Target Command Register, which is used to select the SCSI control lines when the SCSI port is used in "target" mode. This register can also be used in our application: the expected phase (command or data, input or output, message or not) can be loaded into this register by the SCSI driver.
  • Page 164 Peritek Table 5-40 SCSI Protocol The basic order of the SCSI protocol is arbitration (optional - required only for multiple initiators), selection, command transfer, data transfer (optional), and termination. Selection is achieved as follows: Monitor the SCSI signals BSY, RST, and SEL.

  • Page 165: Pc Keyboard Controller (8242Pc)

    The HSP uses the VMEbus P2 connector and follows the VSB data bus assignments. However, no attempt has been made to be compatible with the VSB. Also, the SCSI port option available on the VCT-V and VCU-V shares some of the same pins with the HSP. Therfore, you can't have both options on the same board.
  • Page 166 VCD-V and VCU-V, DATA_00H - DATA_31H carry four bytes of pixel data, where pixel 0, the leftmost pixel on the display, is carried on DATA_00H - DATA_07H. DATA_00H is the LSB. In the VCT-V, DATA_00H - DATA_31H carry one pixel. Four additional control signals are defined (all low active): outputs: VSL, HSL, and REL;...
  • Page 167 Peritek Table 5-41 DUART Control Bit Usage for HSP VMEbus Relative Read/ Address Write Mnemonic Function Read IPCR DUART0 Input Port Change Register Bit 0 PRDYL is intended to allow the UE to tell the graphics board when it has the first long word of pixel data available to be read.

  • Page 168: Graphics Board Interrupts

    Peritek 5.16 Graphics Board Interrupts The board provides prioritized interrupts for use with the 34020 and the VMEbus host CPU. The VMEbus can be interrupted by the 34020. Interrupt sources for the 34020 are the DUARTs, VMEbus, and vertical line count. Vertical Sync is not supported because the 34020 has internal registers which support interrupt on any line.

  • Page 169: Flash Eeprom And Serial Eeprom

    Peritek has developed procedures for generating PROM-based software and loading EEPROMs with the code, using a PC and a BP Microsystems Programmer. Please contact Peritek for more information. As part of Peritek's software offerings, a simple terminal emulator (PTERM), PX Windows X11R6 server, and CnP Graphics Subroutine Package can now be supplied in EEPROM.
  • Page 170 Peritek Serial EEPROM The graphics board includes an IC position for an Atmel AT93C66 (or equivalent) 4 Kb (512 bytes) Serial Electrically Erasable Programmable Read Only Memory (EEPROM). This device is useful in an application where the EPROM is used to run an application program and some data needs to be stored during power-down.

  • Page 171: Introduction

    Chapter 6 Troubleshooting 6.1 Introduction This chapter contains information which should assist you in tracking down installation and functional problems with your board. There are several sections to this chapter: 6.2 Selecting an Address Range for your Board 6.3 Memory Map Address Example 6.4 Does this board talk at all? 6.5 General procedures 6.6 Maintenance, Warranty, and Service...

  • Page 172: Selecting An Address Range For Your Board

    Note It is necessary to determine the correct address ranges of your CPU before you attempt to run the Peritek software. If you are unable to do so, even after reading this section, please contact Peritek for assistance. Most CPU boards used on the VMEbus have a 32-bit physical address space, even if the CPU chip itself only puts 24 bits (i.e.
  • Page 173 Peritek Table 6-1 Common CPU board addresses Manufacturer Address Ranges Resource Comments Force CPU-30 and 00400000-F9FFFFFF VSB/VME A32, D32 CPU-40 FBFF0000-FBFF7FFF VME Short I/O A16, D32 Force SPARC CPU's 00400000-F9FFFFFF VSB/VME A32, D32 FBFF0000-FBFF7FFF VME Short I/O A16, D32 GMS V36 and V46...

  • Page 174: Memory Map Example

    Contact Peritek for more information. The CPU's have an undocumented register which responds at offset 10 in A16 space, so Peritek boards cannot use the bottom of A16 space. Also, the 167/187 may be configured by operating system software to support only A16/D16 transfers.

  • Page 175: Does This Board Talk At All

    Typical equipment required for the test is a suitable monitor (analog RGB with sync on green) and a MVME167-based computer with Unix System V. Peritek supports QIC-150 cartridge tape distribution media. If you have problems with the board responding, you may have an address conflict.
  • Page 176 ;this is the right value for a halted 34020 enter <CR> ;end the dialog You will get an error message (which is not what you want) if there is no response. If indeed the board appears to be dead, call Peritek for further assistance. 6-6 Troubleshooting...

  • Page 177: General Procedures

    Consult your computer's technical manual for information on how to correctly determine this. A typical VCT-V, VCU-V, or VCD-V will draw about 2 amps at +5 volts. When attempting to verify that the power supply is working properly, it is not unusual to unplug everything and measure the supply without a load.
  • Page 178 No DC power Check for correct +5 and +12 volts. Cannot Boot Cable(s) dislodged During installation an unrelated cable can get dislodged. Cannot read Peritek Improperly inserted, Check insertion and position. Take distribution media damaged, or incorrect care that media is "mounted"...

  • Page 179: Maintenance, Warranty, And Service

    Peritek 6.6 Maintenance, Warranty, and Service Maintenance The VCD-V, VCT-V, and VCU-V require no regular service, but if used in a particularly dirty environment, periodic cleaning with dry compressed air is recommended. Because of the heat generated by normal operation of the graphics board and other boards in the system, forced crossflow ventilation is required.
  • Page 180 If extensive repairs are required, Peritek will request authorization for an estimated time and materials charge. If replacement is required, additional authorization will be requested. All repair work will be done at the Peritek factory in Oakland, California, unless otherwise designated by Peritek. 6-10 Troubleshooting...
  • Page 181 5380 (see SCSI), 5-66 Byte/Word/Longword Mapping, 5-18 64 MB Window, 5-8 Case A DLUT Memory Map, 5-59 8-bit SCSI Port (VCT-V and VCU-V), 2-29 Case C DLUT Memory Map, 5-60 8242PC, 5-69 Case S DLUT Memory Map, 5-59 A16, 6-2...
  • Page 182 DUART, 1-7, 5-64 Panels, 2-33 DUART Control Bit Usage for HSP, 5-71 Jumper Locations for the VCD-V, 2-11 DUART Initialization Table, 5-65 Jumper Locations for the VCT-V and VCU-V, 2- EEPROM, 1-9 EL gray scale panel, 2-33 LAR, 4-7, 5-6 EPROM, 4-11...
  • Page 183 4-14 REVFLAG, 5-4 VCT, VCU, VCD Common PLD Device RGB outputs, 2-22 Summary, 4-13 RJ11, 2-26 VCT-V and VCU-V PTERM Serial Jumpers RS-232 (see DUART), 1-7 (JP22), 2-20 SCSI, 1-7 VCT-V Block Diagram, 4-17 SCSI controller, 5-66 VCU-V and VCT-V SCSI Connections to...

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