1. Manuals
  2. Brands
  3. BELINEA Manuals
  4. Monitor
  5. 10 55 70
  6. Service manual

BELINEA 10 55 70 Service Manual

Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the 10 55 70 and is the answer not in the manual?

Questions and answers

Related Manuals for BELINEA 10 55 70

Summary of Contents for BELINEA 10 55 70

  • Page 2 Notes Belinea IO 55 70 Service Manual...
  • Page 3 Preface Before You Start Safety Checkout General Safety Precautions The following checks must be made after correcting the Use an isolation transformer in the power line and AC original service problem and before the unit is returned to the supply to troubleshoot. customer.
  • Page 4 Leakage Current Hot Check How to Find A Good Earth 1. Plug the AC cord into the AC outlet. Do not use an A cold water pipe is a guaranteed earth ground; the cover plate retaining screw on most AC outlet boxes is also at earth isolation transformer for this check.
  • Page 5 Disassembly Instructions Removing the Rear Cover..... 2-1 2.1. internal Disassembly (Right Side)....2-l 2.2.
  • Page 6 2 . Remove the connected pin from the Neck Board. Refer to the figure 2-2 (B). 3 . Remove the screw at the rear chassis. Refer to the figure VA Version 2-2 (C). 4. Cut the two cable ties indicated to free the cables. Refer to the figure 2-2 (D).
  • Page 7 4 . Remove the Neck Shield. 5 . Remove Neck Board. To avoid risk of electric shock, before re- moving the anode cap, made sure tdhe a& 6. Remove the Main Board. ode has been completely discharged as high voltage may remain on the anode for extended time after power off.
  • Page 8 Disconnect the degaussing coil from the main board. Refer to the figure 2-8 (B). 3. Removing the screw from the chassis mat. Refer to the figure 2-8 (C). Place the display flat on its face and remove the nylon revets holding the main board in place on the frame. 2.6.
  • Page 9 11. Remove the CRT anode cap. Refer to the figure 2-9 (J). 12. Place the diiplay flat on its face and remove the nylon Refer to the figure 2-9 (K). 2.9. Removing the Neck Board and Main Board of the neck board. Refer to the figure 2-10 (A). 2 .
  • Page 10 Notes...
  • Page 11 Part 7. VA Version Switching Power Supply ..... . . 3.1. The Deflection Circuit ......3.2.
  • Page 12 by the transformer to reach the rated value. In order to prevent Part 1. the transformer from being saturated and causing damage to the transistor, when transistor 46 is in the OFF state, the energy stored in the transformer T3 is released into the secon- dary coil and is regulated through the various output loops and this, at the appropriate time, the windings pin 1 - pin2 supply 3.1.
  • Page 13 the anode of 42 is fed from an alternating source, once the by micro processor, additional current is drawn from gate is reverse biased, this device is then turned off until the the virtual earth node of IC4, thus causing the power current in the opto-coupler drops to zero, thus eliminating the supply to serve the rail to a high voltage, nominally power that would otherwise be washed in the start-up resis-...
  • Page 14 from the monitor H.D. area, and after getting syn- The parallelogram of different modes can be individually adjusted by changing the VDC chronization through QPl trigger pin2 of ICP2, a level at pin 4. high voltage feedback signal ( FB). is input to QP2 to obtain the DC level.
  • Page 16 Vertical Si Control dition to the variable correction in the ramp generator. The pulse voltage output by the oscillator is The vertical output amplifier has a voltage sent to the sawtooth wave generator. The size boost circuit to triple the positive supply volt- and amplitude of the voltage of the sawtooth age during retrace in order to speed up flyback.
  • Page 17 The sawtooth wave is Atput from Pin .lO of to increase linearly until such time as 4310 turns off, hence storing a predetermined to Pin 2 of IC302. It is then output from Pin 1 amount of flux energy in the transformer. As of IC302 and after being sent to Q353’s collec- zero, the secondary voltage is driven above the tor output, is added to horizontal B+ to provide...
  • Page 18 tooth current. ‘l%e basic circuit and equivalent increases as the voltage onC decreases, and at circuit are shown in Figures 3-5 and 3-6. time t4, the voltage of C is 0, at which time the current is at maximum, which means the cur- Damping diode rent flowing into the deflection yoke is also maximum.
  • Page 19 Transistor ON (a) Base Input voltage (b) Current through transistor (c) Current through diode (d) Capacitor current (e) Current through deflection yoke Voltage generated in deflection yoke VDM. This voltage is derived from the output curve to the linear ramp, resulting in asymmet- of 4353 after buffering by a unity voltage gain amplifier formed by 4354 and 4355.
  • Page 20 (b) First half of return line period (t2 - t3) (a) Second half of scanning period (tl - C?) (d) First half of scanning period (t4 - t5) (c) Second half of return line period (t3 - t4), Figure 3-8 Polarity of Transformer Voltage current into L303.
  • Page 21 just the current though H-DY’s current achiev- value ing size control. and getting the synchtunixation. In addition, width control is achieved by adding a DC In the event of the horizontal oscillator stop offset to the output current at 4353 collector propor- ping, as occurs during mode change etc., the tional to the DAC outputs on pin 9 and 10 of IC307.
  • Page 22 The outputs of the video preamplifier are fed to IC501, a hybrid power amplifier IC type LM2419, through resistors 4302 is ON and CS is C31 l,C313 and C324 in R524, R526 and R528. In addition, on screen display video information generated by IC502 can be injected via diodes...
  • Page 23 blanking signals are coupled into this amplifier to prevent power is now on. In this way the front user on/off switch can visible retrace lines. toggle the on/off state and also always act as a micro reset switch. 3.4. Microprocessor And Sync 3.4.1.
  • Page 24 by the transformer to reach the rated value. In order to prevent the transformer from being saturated and causing damage to the transistor, when transistor 46 is in the OFF state, the Non-VA Version energy stored in the transformer 73 is released into the secon- dary coil and is regulated through the various output loops and filters and converted to the required DC output.
  • Page 25 the anode of Q2 is fed from an alternating source, once the by micro processor, additional current is drawn from gate is reverse biased, this device is then turned off until the the virtual earth node of IC4, thus causing the power current in the opto-coupler drops to zero, thus eliminating the supply to serve the rail to a high voltage, nominally power that would otherwise be washed in the start-up resis-...
  • Page 26 The internal curmnt source is controlled by the voltage on the D.A.C (digital to analog con- chronization through QPl trigger pin2 of ICP2, a verter) output, VFREQ, and is varied under high voltage feedback signal ( FB), is input to QP2 microprocessor control to allow sync befween to obtain the DC level.
  • Page 28 Vertical Centering Adjustment ternally to IC304 by DC controlled variable Since IC202 functions as an OCL circuit, VDC gain stage. ‘Ihe voltage is derived by sum of 2 is output from Pin 7 of IC201, so the central DAC output, VSIZEl and VSIZE2. which are current can be changed to shift the on-screen summed together give 128 bit resolution.
  • Page 29 circuit and the output circuit to amplify the Pin 3 being a fued reference pulse voltage. At the same time, after the wave- current, and after VDC conversion in VIZ393 form has been regulated, by adding this circuit to the output circuit, this amplification circuit H-sync signal (output from Pin 6 of T302) functions as a drive amplifier.
  • Page 30 Finally, when all charge in the base region of 4301 is dissipated the base current suddenly At t2, a negative load is applied to the to the stops, and the secondary current drops almost base and the output transistor changes to OFF instantly to zero.
  • Page 31 Transistor ON (a) Base input voltage (b) Current through transistor (c) Current through diode (d) Capacitor current (e) Current through deflection yoke (f) Voltage generated in deflection yoke Figure 3-20 Horizontal Output Voltage/Current Waves curve to the linear ramp, resulting in asymmet- ing through the deflection yoke which would otherwise cause an undesirable deflection of In addition to the AC coupling of the deflection...
  • Page 32 (b) First half of return line period (t2 - t3) (a) Second half of scanning period (tl - t2) (d) First half of scanning period (t4 - t5) (c) Second half of return line period (t3 - t4), Figure 3-21 Polarity of Transformer Voltage The voltage seen in the output stage require special attention.
  • Page 33 voltage at a constant 26kV a regulation system this voltage is required. This is achieved using a buck regu- begins to drop below this threshold. Thus a lation stage formed by a ICE? driving a PET, signal is generated which can be fed to video synchronized by the horizontal oscillator.
  • Page 34 R339. When the feedback pulse voltage exceeds the of the horizontal sync pulse, differentiates it through C531, set voltage, the +15V output from Pin 7 of IC303, then squares it via the monostable feedback action of C525 after passing through D37 1, R401 and input to Pin8 and RX3 to provide a precise length digital clamping pulse which is applied IC503 via pin14.
  • Page 35 When power is disturbed to the unit, the power reset line goes video generation IC that has its own crystal oscillator, X501 low. This also causes an input to the micro via the MODEC by using an internal Phase Locked Loop (I’LL) the IC cansync line.
  • Page 36 3.10. Audio Amplifier 3.10. Audio Amplifier The R/L audio signals are supplied through a P905 directly to The R/L audio signals are supplied through a P905 directly to the Main Board at connector P9O4 and P903. The audio the Main Board at connector P9O4 and P903. The audio signals are impedances by R901, R902, R903 and R904.

  • Page 37: Table Of Contents

    Part 1. VA Version Preparing the Display for Adjustment ..... 4-1 4.1. Adjustment Procedures....... . 4.2.

  • Page 38: Part 1. Va Version

    4.2. Adjustment Procedures 42.1. Adjustment Sequence VA Version This display undergoes an automatic alignement procedure during manufacture. This alignment procedure follows a fixed sequence of adjustments which are dupplicated in this section. When making manual adjustments during service, you should 4.1.

  • Page 39: High Voltage Verification

    Steps used in white balance adjust- ment: The adjustment settings in this section are based on REVISION B of the factory aiign- ment procedures. Appendices detailing 4.4. Background Brightness Setting changes in the factory alignment proce- 1. Input a raster pattern in primary mode and turn external dures that have occurred since publication brightness to maximum.

  • Page 40: Colormisconvergence

    KEYSTONE ness so it is not visible and set external contrast so the Sets upper and lower keystone distortion to less than brightness is 30FL. Switch to a display of ” @” charac- ters. 8. PARALLELOGRAM 2 . Adjust the FBT focus VRl and VR2 so the 0 characters Sets parallelogram distortion to less than 15mm.

  • Page 41: Display Size Stability

    4.15. Display Size Stability 4.20. DDC l/2 Data Witting Inputer a full white pattern in primary mode, set external Wing the DDC l/2 data in EEROM. brightness at 5FL and measute the display size. Adjust the brightness to 30FL and remeasure the display size. The dif- fereness should be less than 2.Omm.

  • Page 42: Part 2. Non-Version

    4.22. Adjustment Procedures Part 2. 422.1. Adjustment Sequence Non-VA Version This display undergoes an automatic alignement procedure during manufacture. This alignment procedure follows a fixed sequence of adjustments which are dupplicated in this section. 4.21. Preparing the Display for When making manual adjustments during service, you should always make the adjustments in the order given here to ensure Adjustment correct results.

  • Page 43: High Voltage Verification

    Steps used in white balance adjust- ment: The adjustment settings in this section are based on REVISION B of the factory align- ment procedures. Appendices detailing 4.24. Background Brightness Setting changes in the factory alignment proce- 1. Input a raster pattern in primary mode and turn external dures that have occurred since publication brightness to maximum.

  • Page 44: Colormisconvergence

    8. PARALLELOGRAM 2 . Adjust the FBT focus VRl and VR2 so the 0 characters Sets parallelogram distortion to less than l.Smm. are as clear as possible. 4.29. Color Misconvergence Conclusion of automatic alignment: 1 . Input a full white pattern in primary mode and adjust external brightness so there is no backguound bright- 4.32.

  • Page 45: Video Noise

    4.36. Color Purity Veriiication 1. Input a full white pattern in primary mode and adjust external brightness so there is no background brightness and adjust external contrast to 25FL. Make a visual check of color purity as follows: should be visible. 4.37.
  • Page 46 Notes...
  • Page 47 Troubleshooting Part 7. VA Version No Display at Power-on ..... . 5.1. No X-ray Operation......5.2.
  • Page 48 5.1. No Display at Power-on Orange power-on Check I/O cable Check IC707,Q8,R59, Logic PCB to Power Supply PCB Conjunction of wire Check IC506 and IC504 Check Power Supply...
  • Page 49 5.2. No X-ray Operatidn No X-ray operation Check F. B.T Check Q370,Q371 ,ZD31 C Check Q8,R59,R75 and...
  • Page 50 5.3. No Video Operation No Video operation at Power-ON Check IC504,IC506, Check Q502...
  • Page 51 5.4. Poor Vertical Linearity Check firm ware Check R411 ,R487 Check IC308,R480,R4811 R488 and R489 Check IC202,R203 and R204...
  • Page 52 5.5. Poor Horizontal Linearity Horizontal linearity over 10% Check Logic firm ware and Logic Circuit Check Q350,Q302,Q309 and RL301 Check C311,C324$313 for current leakage or capacity over -+5% Check function Check Q309,RL301,...
  • Page 53 5.6. Poor Uniformity Check video amp. circuits Check Degauss circuit and PTCR Change C.R.T...
  • Page 54 5.7. Tilted Display Area than 1.75mm Check C.R.T of cross hatch mechanical position Readjust C.R.T mounting and bezel Check pin1 1 (OV-SV) of out voltage is -15V-+15V and Q356,Q357...
  • Page 55 5.8. Misconvergence * Misconvergence over 0.3/0.4mm and 6 pole pole Check CRT...
  • Page 56 5.9. Poor Regulation wave is 6OV-180V ICP2: pin 2 - sawtooth pin 5 - DC (6.5v) Check QP2 E N D...
  • Page 57 5.10. No Audio Amplifier No Audio Operation at Power-on Check IC901, P903, Check IC902, P901 Check SW901 Check Speaker and check SW903...
  • Page 58 Non-VA Version 5.11. No Display at Power-on Check I/O cable Check IC707,Q8,Fi59, Logic PCB to Power Supply PCB Conjunction of wire Check IC506 and IC504 Check Power Supply...
  • Page 59 5.12. No X-ray Operation Check F.B.T Check lC303,0373, Check IC304 normal of level Retry power-on 5-12...
  • Page 60 5.13. No Video Operation No Video operation at Power-ON Check Q501 ,Q502 5-13...
  • Page 61 5.14. Poor Vertical Linearity Check firm ware Check IC307 Check C387 and IC304 Check IC202,D210,...
  • Page 62 5.15. Poor Horizontal Linehy Horizontal linearity over 10% Check Logic fim ware and Logic Circuit Check Q35O,Q302,Q309 and IX301 Check C311 .C324,C313 for current leakage or capacity over 25% E N D...
  • Page 63 5.16. Poor Uniformity . Check video a&p. circuits Check Degauss circuit and PTCR Check power supply circuits Change C.R.T 5-16...
  • Page 64 5.17. Tilted Display Area Check Check C.R.T mechanical position Readjust C.R.T mounting and bezel Check pin1 1 (OV-5V) of out voltage is -15V-+15V and Q356,Q357...
  • Page 65 5.18. Misconvergence Misconvergence over 0.3/0.4mm Check CRT 5-18...
  • Page 66 5.19. Poor Regulation Regulation over ICP2: pin 2 - sawtooth pin 5 - DC (6.5V) Check QP2 and FB END’...
  • Page 67 5.20. No Audio Amplifier No Audio Operation Check IC901, P903, Check IC902, P901 Check SW901 Check Speaker and check SW903 5 - 2 0...

Table of Contents