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Aaeon FWS-7820 User Manual

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FWS-7820
Network Appliance
st
User's Manual 1
Ed
Last Updated: August 8, 2016

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  • Page 1 FWS-7820 Network Appliance User’s Manual 1 Last Updated: August 8, 2016...

  • Page 2: Copyright Notice

    AAEON assumes no liabilities resulting from errors or omissions in this document, or from the use of the information contained herein. AAEON reserves the right to make changes in the product design without notice to its users.
  • Page 3 Acknowledgement All other products’ name or trademarks are properties of their respective owners. Microsoft Windows is a registered trademark of Microsoft Corp.  Intel, Pentium, Celeron, and Xeon are registered trademarks of Intel Corporation  Core, Atom is a trademark of Intel Corporation ...
  • Page 4 Packing List Before setting up your product, please make sure the following items have been shipped: Item Quantity FWS-7820  EAR bracket kit  Console cable  Product DVD  If any of these items are missing or damaged, please contact your distributor or sales representative immediately.
  • Page 5 (if any), its specifications, dimensions, jumper/connector settings/definitions, and driver installation instructions (if any), to facilitate users in setting up their product. Users may refer to the AAEON.com for the latest version of this document. Preface...
  • Page 6 All cautions and warnings on the device should be noted. All cables and adapters supplied by AAEON are certified and in accordance with the material safety laws and regulations of the country of sale. Do not use any cables or adapters not supplied by AAEON to prevent system malfunction or fires.
  • Page 7 As most electronic components are sensitive to static electrical charge, be sure to ground yourself to prevent static charge when installing the internal components. Use a grounding wrist strap and contain all electronic components in any static-shielded containers. If any of the following situations arises, please the contact our service personnel: Damaged power cord or plug Liquid intrusion to the device iii.
  • Page 8 FCC Statement This device complies with Part 15 FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received including interference that may cause undesired operation.
  • Page 9 China RoHS Requirements (CN) 产品中有毒有害物质或元素名称及含量 AAEON Embedded Box PC/ Industrial System 有毒有害物质或元素 部件名称 铅 汞 镉 六价铬 多溴联苯 多溴二苯醚 (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) 印刷电路板 ○ ○ ○ ○ ○ ○ 及其电子组件 外部信号 ○ ○ ○ ○ ○ ○...
  • Page 10 China RoHS Requirement (EN) Poisonous or Hazardous Substances or Elements in Products AAEON Embedded Box PC/ Industrial System Poisonous or Hazardous Substances or Elements Hexavalent Polybrominated Polybrominated Component Lead Mercury Cadmium Chromium Biphenyls Diphenyl Ethers (Pb) (Hg) (Cd) (Cr(VI)) (PBB) (PBDE) PCB &...

  • Page 11: Table Of Contents

    Table of Contents Chapter 1 - Product Specifications ..................1 Specifications ......................2 Chapter 2 – Hardware Information ..................5 Dimensions ....................... 6 Jumpers and Connectors ..................11 List of Jumpers ....................... 15 2.3.1 RTC Reset (CN40) ..................16 2.3.2 Secondary RTC Reset (CN39) ..............
  • Page 12 Installing CPU and Heat Sink ................34 Installing Expansion Card ..................40 Chapter 3 - AMI BIOS Setup ....................42 System Test and Initialization ................43 AMI BIOS Setup ..................... 44 Setup Submenu: Main ..................45 Setup Submenu: Advanced ................. 46 3.4.1 Advanced: CPU Configuration ..............
  • Page 13 Setup submenu: Chipset ..................70 3.5.1 Chipset: System Agent (SA) Configuration .......... 71 3.5.1.1 System Agent (SA) Configuration: Graphics Configuration ..72 3.5.2 Chipset: PCH-IO Configuration .............. 73 Setup submenu: Security ..................74 Setup submenu: Boot ................... 75 Setup submenu: Save & Exit ................76 Setup submenu: Event Logs ................

  • Page 14: Chapter 1 - Product Specifications

    Chapter 1 Chapter 1 - Product Specifications...

  • Page 15: Specifications

    Specifications System Intel® 6 Gen Core™/Xeon® Processors Processor  288-pin DDR4 1600/1866/2133MHz ECC or System Memory  Non-ECC DIMM x 4, up to 64GB Intel® C236 Chipset  1GbE x 6 + NIM Modules Ethernet  AMI BIOS BIOS  SATA 3.0 Gb/s x 2 Serial ATA ...
  • Page 16 Power Switch x 1 VGA port (Optional) Expansion Slot x 1 (optional 1 x PCIe [x4], with PCIe [x8] connector) (Note 2) Black Color  250W x1 AC Power Input Power Supply  430 x 475 x 44 mm (16.9 x 18.7 x 1.7”) Dimension (W x D x H) ...
  • Page 17 0.5 Grms/5~500Hz/ operation (3.5” HDD) Anti-Vibration  1.5 Grms/5~500Hz/ non-operation 10G peak acceleration (11m sec. duration), Anti-Shock  operation 20G peak acceleration (11m sec. duration), non operation Note 1: 2nd SATA is Co-layout with mSATA/CF/CFast. The default is CF and you can choose any one from the 4 options.

  • Page 18: Chapter 2 - Hardware Information

    Chapter 2 Chapter 2 – Hardware Information...

  • Page 19: Dimensions

    Dimensions System Chapter 2 – Hardware Information...
  • Page 20 Board Chapter 2 – Hardware Information...
  • Page 21 Chapter 2 – Hardware Information...
  • Page 22 PER-T393 Chapter 2 – Hardware Information...
  • Page 23 Chapter 2 – Hardware Information...

  • Page 24: Jumpers And Connectors

    Jumpers and Connectors Component Side Chapter 2 – Hardware Information...
  • Page 25 Solder Side Chapter 2 – Hardware Information...
  • Page 26 PER-T393 Chapter 2 – Hardware Information...
  • Page 27 Chapter 2 – Hardware Information...

  • Page 28: List Of Jumpers

    List of Jumpers Please refer to the table below for all of the board’s jumpers that you can configure for your application Label Function CN40 RTC Reset CN39 Secondary RTC Reset CN23 CF Power Selection Auto Power Button Chapter 2 – Hardware Information...

  • Page 29: Rtc Reset (Cn40)

    2.3.1 RTC Reset (CN40) 1 2 3 1 2 3 Normal (Default) Clear CMOS 2.3.2 Secondary RTC Reset (CN39) 1 2 3 1 2 3 Normal (Default) RTC TEST 2.3.3 Auto Power Button Selection (CN23) 1 2 3 1 2 3 Don’t use Auto PWRBTN (Default) Use Auto PWRBTN 2.3.4 CFD Voltage 3.3/5V Selection (JP1)

  • Page 30: List Of Connectors

    24-Pin ATX Power Connector PS/2 keyboard & Mouse Connector CPU_FAN1 CPU_FAN1 CPU_FAN2 CPU_FAN2 SYS_FAN1 SYS_FAN1 CN11 Power button CN12 PCIE Slot For FWS-7820 Pin Define CN14 COM Port CN17 LCM Connector CN18&CN27 SATA Port Connector CN19& CN20 HDD Power Connector CN22 LPC Connector...
  • Page 31 DIMM2 Channel A DDR4 U-DIMM DIMM3 Channel B DDR4 U-DIMM DIMM4 Channel B DDR4 U-DIMM Front Panel Pin Header Front Panel Pin Header PCIE1 NIM Card Connector PCIE2 NIM Card Connector PCIE4 NIM Card Connector USB1& USB2 USB3.0 Port VGA1 VGA Port Chapter 2 –...

  • Page 32: Digital I/O: 2.0Mm Pin Header 2 X 5P (Cn43)

    2.4.1 Digital I/O: 2.0mm Pin Header 2 x 5P (CN43) Signal Signal Type DIO0 Input / Output DIO1 Input / Output DIO2 Input / Output DIO3 Input / Output DIO4 Input / Output DIO5 Input / Output DIO6 Input / Output DIO7 Input / Output +3.3V...

  • Page 33: Key Pad Connector: 2.54Mm Pin Header 1 X 4P (Cn41)

    DATA4 Input / Output DATA5 Input / Output DATA6 Input / Output DATA7 Input / Output LCD# Output 2.4.3 Key PAD Connector: 2.54mm Pin Header 1 x 4P (CN41) Signal Signal Type KEY PAD Down Input KEY PAD Up Input KEY PAD Right Input KEY PAD Left...

  • Page 34: Vga Port: 2.0Mm Box Header (Vga1)

    RI / +5V / +12V Input / PWR N.C. 2.4.5 VGA Port: 2.0mm Box Header (VGA1) Signal Signal Type Output +5V_CRT Green Output Blue Output CRT_PLUG# Input DDC_DATA Input / Output CRT_OHSYNCF Output CRT_OVSYNCF Output DDC_CLK Input / Output 2.4.6 HDD Power Connector: 2.5mm Wafer 1 x 4P (CN19 & CN20) Signal Signal Type +12V...

  • Page 35: Usb 3.0 Port: 2.0Mm Box Header 2 X 10P (Usb1 & Usb2)

    2.4.7 USB 3.0 Port: 2.0mm Box Header 2 x 10P (USB1 & USB2) Signal Signal Type +5V_USB USB3_RX1_DN DIFF USB3_RX1_DP DIFF USB3_TX1_DN DIFF USB3_TX1_DP DIFF USBP_0N DIFF USBP_0P DIFF USBP_1P DIFF USBP_1N DIFF USB3_TX2_DP DIFF USB3_TX2_DN DIFF USB3_RX2_DP DIFF USB3_RX2_DN DIFF +5V_USB Chapter 2 –...

  • Page 36: Ps/2 Keyboard & Mouse Connector: 2.54Mm Pin Header 2 X 4P

    2.4.8 PS/2 Keyboard & Mouse Connector: 2.54mm Pin Header 2 x 4P (CN1) Signal Signal Type KB_DATA Input / Output KB_CLK Output +5V_KB MS_DATA Input / Output MS_CLK Output 2.4.9 Front Panel Pin Header (FP1) Signal Signal Type External Speaker (+) Output Key Board Lock (+) Output...

  • Page 37: Front Panel Pin Header (Fp2)

    2.4.10 Front Panel Pin Header (FP2) Signal Signal Type Power On Button(+) Input Reset Switch (+) Input Power On Button(-) POWER Reset Switch (-) POWER HDD LED (+) POWER Power LED(+) POWER HDD LED (-) Output Power LED(-) Output 2.4.11 LPC Connector: 1.0mm Box Wafer 1 x 12P (CN22) Signal Signal Type...

  • Page 38: Per-T393 Front Panel Jumpers And Connectors List

    PER-T393 Front Panel Jumpers and Connectors List Label Function Software Reset LED1 POWER+STATE+HDD LED Instruction COMSOLE+ 2PORT USB3.0 2PORT RJ45 Management LAN PORT 4PORT RJ45 LAN PORT LED2 BYPASS LED Instruction Chapter 2 – Hardware Information...

  • Page 39: Installing 2.5" Hard Disk Drives (2 Pieces)

    Installing 2.5” Hard Disk Drives (2 pieces) Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 40 Remove the four highlighted screws to remove the HDD bracket Put the provided screws (not the ones from step 3) into cushions Chapter 2 – Hardware Information...
  • Page 41 Attach the assembled screws to the top and bottom of the inside of the bracket Place the HDDs into the bracket, tighten the screws to secure Chapter 2 – Hardware Information...
  • Page 42 Place the assembled HDDs back into the system, secure with screws and reattach the SATA and power cables. Chapter 2 – Hardware Information...
  • Page 43 Chapter 2 – Hardware Information...

  • Page 44: Installing 3.5" Hard Disk

    Installing 3.5” Hard Disk Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 45 Remove the screws to remove the bracket Place the 3.5” HDD on the bracket, secure with screws on the underside Chapter 2 – Hardware Information...
  • Page 46 Put the assembled HDD on the HDD bay, secure with screws and reattach the SATA and power cables Chapter 2 – Hardware Information...

  • Page 47: Installing Cpu And Heat Sink

    Installing CPU and Heat Sink Remove the highlighted screws to remove the fan duct Chapter 2 – Hardware Information...
  • Page 48 Lift the socket arm up to open the CPU socket Chapter 2 – Hardware Information...
  • Page 49 Chapter 2 – Hardware Information...
  • Page 50 Remove the cover and place the CPU into the socket. Make sure the two fillisters are properly locked. Chapter 2 – Hardware Information...
  • Page 51 Push the arm down to lock the CPU into place Place the heat sink onto the CPU. Make sure the direction of the heat sink is not against the airflow Chapter 2 – Hardware Information...
  • Page 52 Close the air duct and secure with screws Chapter 2 – Hardware Information...

  • Page 53: Installing Expansion Card

    Installing Expansion Card Remove the highlighted screws From the front of the system, slide it upwards to remove Chapter 2 – Hardware Information...
  • Page 54 Remove the screw to remove the cover bracket Firmly insert the expansion card into the slot and secure the screw. Chapter 2 – Hardware Information...

  • Page 55: Chapter 3 - Ami Bios Setup

    Chapter 3 Chapter 3 - AMI BIOS Setup...

  • Page 56: System Test And Initialization

    System Test and Initialization The system uses certain routines to perform testing and initialization. If an error, fatal or non-fatal, is encountered, a few short beeps or an error message will be outputted. The board can usually continue the boot up sequence with non-fatal errors. The system configuration verification routines check the current system configuration against the values stored in the CMOS memory.

  • Page 57: Ami Bios Setup

    AMI BIOS Setup The AMI BIOS ROM has a pre-installed Setup program that allows users to modify basic system configurations, which is stored in the battery-backed CMOS RAM and BIOS NVRAM so that the information is retained when the power is turned off. To enter BIOS Setup, press <Del>...

  • Page 58: Setup Submenu: Main

    Setup Submenu: Main Chapter 3 – AMI BIOS Setup...

  • Page 59: Setup Submenu: Advanced

    Setup Submenu: Advanced Chapter 3 – AMI BIOS Setup...

  • Page 60: Advanced: Cpu Configuration

    3.4.1 Advanced: CPU Configuration Options summary: Disabled Intel Virtualization Technology Enabled Default En/Disable CPU Virtualization Technology function Intel(R) Disabled Default SpeedStep(tm) Enabled When enabled, OS sets CPU frequency according load. When disabled, CPU frequency is set at max non-turbo. Chapter 3 – AMI BIOS Setup...

  • Page 61: Advanced: Trusted Computing

    3.4.2 Advanced: Trusted Computing Options summary: Security Device Support Disable Enable Default Enable or Disables BIOS support for security device. O.S. will not show Security Device. TCG EFI protocol and INT1A interface will not be available. TPM State Disable Enable Default Enable or Disables security device.

  • Page 62: Advanced: Sata Configuration

    Enable Default Enable or Disables Platform Hierarchy. Storage Hierarchy Disable Enable Default Enable or Disables Storage Hierarchy. 3.4.3 Advanced: SATA Configuration Options summary: SATA Controllers Disabled Enabled Default En/Disable SATA Controller. SATA Mode Selection AHCI Default RAID Chapter 3 – AMI BIOS Setup...

  • Page 63: Advanced: Pch-Fw Configuration

    AHCI: Configure SATA controllers to operate in AHCI mode Port Disabled Enabled Default En/Disable Port. Hot Plug Disabled Default Enabled En/Disable Hot Plug function 3.4.4 Advanced: PCH-FW Configuration Options summary: Firmware Update Configuration Disabled Default Enabled Enable/Disable Me FW image Re-Flash function. Chapter 3 –...

  • Page 64: Advanced: Sio Configuration

    3.4.5 Advanced: SIO Configuration Chapter 3 – AMI BIOS Setup...

  • Page 65: Sio Configuration: Serial Port 1 Configuration

    3.4.5.1 SIO Configuration: Serial Port 1 Configuration Options summary: Use This Device Disabled Enabled Default Enable or Disable this Logical Device. Possible: Change Settings Auto Default IO=3F8h; IRQ=4; IO=2F8h; IRQ=3; Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 66: Sio Configuration: Serial Port 2 Configuration

    3.4.5.2 SIO Configuration: Serial Port 2 Configuration Options summary: Use This Device Disabled Enabled Default Enable or Disable this Logical Device. Possible: Change Settings Auto Default IO=2F8h; IRQ=3; IO=3F8h; IRQ=4; Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 67: Sio Configuration: Parallel Port Configuration

    3.4.5.3 SIO Configuration: Parallel Port Configuration Options summary: Use This Device Disabled Enabled Default Enable or Disable this Logical Device. Possible: (Parallel Port) Auto Default IO=378h; IRQ=5; Allows user to change Device's Resource settings. New settings will be reflected on This Setup Page after System restarts.

  • Page 68: Advanced: Hardware Monitor

    3.4.6 Advanced: Hardware Monitor Options summary: CPU Fan 1 Smart Control Disabled Enabled Default Allows BIOS to En/Disable CPU Fan 1 Smart Control CPU Fan 2 Smart Control Disabled Enabled Default Allows BIOS to En/Disable CPU Fan 2 Smart Control SYS Fan 1 Smart Control Disabled Enabled Default...

  • Page 69: Hardware Monitor: Smart Fan Function (Full On Mode)

    3.4.6.1 Hardware Monitor: Smart Fan Function (Full on Mode) Options summary: Smart Fan Mode Full on Mode Automatic Mode Default Manual Mode Full on Mode: Always on. Manual Mode: Depends on PWM Duty. Automatic Mode: FAN Speed is depends on CPU Temperature. Chapter 3 –...

  • Page 70: Hardware Monitor: Smart Fan Function (Manual Mode)

    3.4.6.2 Hardware Monitor: Smart Fan Function (Manual Mode) Options summary: Smart Fan Mode Full on Mode Default Automatic Mode Manual Mode Full on Mode: Always on. Manual Mode: Depends on PWM Duty. Automatic Mode: FAN Speed is depends on CPU Temperature. Manual PWM Setting 0 –...

  • Page 71: Hardware Monitor: Smart Fan Function (Automatic Mode)

    3.4.6.3 Hardware Monitor: Smart Fan Function (Automatic Mode) Options summary: FAN Control Mode Full on Mode Default Automatic Mode Manual Mode Smart Fan Mode Select. CPU temperature Default Temperature Source System temperature Select temperature Source. Fan off temperature limit 0 ~ 127 Default (15) Temperature Limit Value of Fan Off.
  • Page 72 Fan start PWM 0 ~ 255 Default (35) Fan will start with this PWM value. PWM SLOPE SETTING 0 ~ 15 Default (8) PWM SLOPE Selection Full Speed Temperature 0 ~ 127 Default (72) Temperature Limit Value of FAN Full Speed Chapter 3 –...

  • Page 73: Advanced: Usb Configuration

    3.4.7 Advanced: USB Configuration Options summary: Legacy USB Support Enabled Default Disabled Auto Enables BIOS Support for Legacy USB Support. When enabled, USB can be functional in legacy environment like DOS. AUTO option disables legacy support if no USB devices are connected Chapter 3 –...

  • Page 74: Advanced: Digital Io Port Configuration

    3.4.8 Advanced: Digital IO Port Configuration Options summary: DIO_P#1~4 Input Default Output Allows BIOS to select input/output function to corresponding DIO ping. DIO_P#5~8 Input Default Output Allows BIOS to select input/output function to corresponding DIO ping. DIO_P#1~4 Direction Default Allows BIOS to select high/low voltage level to output to corresponding DIO ping. Chapter 3 –...

  • Page 75: Advanced: Power Management

    3.4.9 Advanced: Power Management Options summary: Power Mode ATX Type Default AT Type Select system power mode. Restore AC Power Loss Last State Default Always on Always off RTC wake system from S5 Disabled Default Fixed Time Dynamic Time Chapter 3 – AMI BIOS Setup...

  • Page 76: Advanced: Lan Bypass Configuration

    Fixed Time: System will wake on the hr::min::sec specified./n Dynamic Time: System will wake on the current time + Increase minute(s) 3.4.10 Advanced: LAN Bypass Configuration Options summary: LAN Bypass Status LED LED OFF Default Configuration RED LED ON RED LED BLINK RED LED FAST BLINK Chapter 3 –...
  • Page 77 GREEN LED ON GREEN LED BLINK GREEN LED FAST BLINK Select LAN Bypass Status LED Configuration. LAN Bypass Kit Configuration Mode for power-on PassTru Default Bypass Mode for power-off PassTru Default Bypass Select LAN Bypass Kit Configuration. WDT Configuration Force Bypass Default System Reset Select WDT Configuration.

  • Page 78: Advanced: Serial Port Console Redirection

    3.4.11 Advanced: Serial Port Console Redirection Options Summary: Enabled Default Console Redirection Disabled Console Redirection Enable or Disable. Legacy Console Redirection Com0 Default Select Legacy Console Redirection port Enabled Console Redirection(EMS) Default Disabled Microsoft Windows Emergency Management Services (EMS) allows for remote management of a Windows Server OS through a serial port.

  • Page 79: Serial Port Console Redirection: Com0 Console Redirection

    3.4.11.1 Serial Port Console Redirection: COM0 Console Redirection Settings Options summary: Terminal Type VT100 VT100+ VT-UTF8 Default ANSI Bits per second 9600 19200 38400 57600 Default 115200 Chapter 3 – AMI BIOS Setup...
  • Page 80 Data Bits Default Parity None Default Even Mark Space Stop Bits Default Flow Control None Default Hardware RTS/CTS VT-UTF8 Combo Key Enabled Default Support Disabled Recorder Mode Enabled Disabled Default Resolution 100x31 Enabled Disabled Default Legacy OS Redirection 80x24 Default Resolution 80x25 Chapter 3 –...

  • Page 81: Serial Port Console Redirection: Console Redirection Settings

    Putty Keypad VT100 Default LINUX XTERMR6 ESCN VT400 Redirection After BIOS Always Enabe Default POST BootLoader 3.4.11.2 Serial Port Console Redirection: Console Redirection Settings Chapter 3 – AMI BIOS Setup...
  • Page 82 Options Summary: Out-of-Band Mgmt Port COM0 Default COM1 Terminal Type VT100 VT100+ Default VT-UTF8 ANSI Bits per second 9600 19200 57600 Default 115200 Flow Control None Default Hardware RTS/CTS Software Xon/Xoff Chapter 3 – AMI BIOS Setup...

  • Page 83: Setup Submenu: Chipset

    Setup submenu: Chipset Chapter 3 – AMI BIOS Setup...

  • Page 84: Chipset: System Agent (Sa) Configuration

    3.5.1 Chipset: System Agent (SA) Configuration Options summary: PEG Port Gen Speed Auto Default Gen1 Gen2 Gen3 Configure PEG Port Gen Speed. Chapter 3 – AMI BIOS Setup...

  • Page 85: System Agent (Sa) Configuration: Graphics Configuration

    3.5.1.1 System Agent (SA) Configuration: Graphics Configuration Options summary: Primary Display Auto Default IGFX PCIE Select which of IGFX/PEG/PCI Graphics device should be Primary Display Or select SG for Switchable Gfx. Primary IGFX Boot Display VBIOS Default Default Select the Video Device which will be activated during POST. This has no effect if external graphics present.

  • Page 86: Chipset: Pch-Io Configuration

    3.5.2 Chipset: PCH-IO Configuration Options summary: PCIEX4_1 Gen Speed Auto Default Gen1 Gen2 Gen3 Select PCI Express port speed. Chapter 3 – AMI BIOS Setup...

  • Page 87: Setup Submenu: Security

    Setup submenu: Security Change User/Administrator Password You can set a User Password once an Administrator Password is set. The password will be required during boot up, or when the user enters the Setup utility. Please Note that a User Password does not provide access to many of the features in the Setup utility. Select the password you wish to set, press Enter to open a dialog box to enter your password (you can enter no more than six letters or numbers).

  • Page 88: Setup Submenu: Boot

    Setup submenu: Boot Options summary: Quiet Boot Disabled Default Enabled En/Disable showing boot logo. Launch PXE OpROM Disabled Default Enabled En/Disable Legacy Boot Option. Chapter 3 – AMI BIOS Setup...

  • Page 89: Setup Submenu: Save & Exit

    Setup submenu: Save & Exit Chapter 3 – AMI BIOS Setup...

  • Page 90: Setup Submenu: Event Logs

    Setup submenu: Event Logs Chapter 3 – AMI BIOS Setup...

  • Page 91: Event Logs: Change Smbios Event Log Settings

    3.9.1 Event Logs: Change Smbios Event Log Settings Options summary: Smbios Event Log Disabled Enabled Default Change this to enable or disable all features of Smbios Event Logging during boot. Erase Event Log Default Yes, Next reset Yes, Every reset Choose options for erasing Smbios Event Log.
  • Page 92 Log System Boot Event Disabled Enabled Default Choose option to enable/disable logging of System boot event. MECI 0-255 Default (1) Mutiple Event Count Increment: The number of occurrences of a duplicate event that must pass before the multiple-event counter of log entry is updated.The value ranges from 1 to 255.

  • Page 93: Event Logs: View Smbios Event Log

    3.9.2 Event Logs: View Smbios Event Log Chapter 3 – AMI BIOS Setup...

  • Page 94: Chapter 4 - Drivers Installation

    Chapter 4 Chapter 4 – Drivers Installation...

  • Page 95: Drivers Installation

    Drivers Installation The drivers can be found in the product page for FWS-7820 at aaeon.com. Please follow the sequence below to install the drivers. Step 1 – Install Chipset Driver Open the Step 1 - Chipset folder followed by the SetupChipset.exe file...
  • Page 96 Step 5 – Install ME Driver Open the Step 5 – ME folder followed by the SetupME.exe file Follow the instructions Drivers will be installed automatically Step 6 – Install Intel RST Driver Open the Step 6 – Intel RST folder followed by the SetupRST.exe file Follow the instructions Drivers will be installed automatically Step 7 –...
  • Page 97 For Windows 7 32/64-bit To run [Change User Account Control Settings] in Control panel\User Accounts and Family Safety Change User Account Control Settings to [Never notify] Chapter 4 – Driver Installation...
  • Page 98 Reboot To run patch.bat with [Run as administrator]. Chapter 4 – Driver Installation...
  • Page 99 For Windows 8 32/64-bit Right click [Command Prompt] and [run as administrator] Chapter 4 – Driver Installation...
  • Page 100 Run Command Prompt by administrator To run patch.bat in UART driver folder path Chapter 4 – Driver Installation...
  • Page 101 Update successful Restart Chapter 4 – Driver Installation...
  • Page 102 Com port driver\serial.sys, provider will change to [Windows(R) Win7 DDK provider] Chapter 4 – Driver Installation...

  • Page 103: Appendix A - Watchdog Timer Programming

    Appendix A Appendix A - Watchdog Timer Programming...

  • Page 104: Watchdog Timer Initial Program

    A.1 Watchdog Timer Initial Program Table 1 : SuperIO relative register table Default Value Note SIO MB PnP Mode Index Register Index 0x2E(Note1) 0x2E or 0x4E SIO MB PnP Mode Data Register Data 0x2F(Note2) 0x2F or 0x4F Table 2 : Watchdog relative register table Register BitNum Value...
  • Page 105 ************************************************************************************ // SuperIO relative definition (Please reference to Table 1) #define byte SIOIndex //This parameter is represented from Note1 #define byte SIOData //This parameter is represented from Note2 #define void IOWriteByte(byte IOPort, byte Value); #define byte IOReadByte(byte IOPort); // Watch Dog relative definition (Please reference to Table 2) #define byte TimerLDN //This parameter is represented from Note3 #define byte TimerReg //This parameter is represented from Note4 #define byte TimerVal // This parameter is represented from Note24...
  • Page 106 ************************************************************************************ VOID Main(){ // Procedure : AaeonWDTConfig // (byte)Timer : Time of WDT timer.(0x00~0xFF) // (boolean)Unit : Select time unit(0: second, 1: minute). AaeonWDTConfig(); // Procedure : AaeonWDTEnable // This procudure will enable the WDT counting. AaeonWDTEnable(); ************************************************************************************ Appendix A – Watchdog Timer Programming...
  • Page 107 ************************************************************************************ // Procedure : AaeonWDTEnable VOID AaeonWDTEnable (){ WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 1); // Procedure : AaeonWDTConfig VOID AaeonWDTConfig (){ // Disable WDT counting WDTEnableDisable(EnableLDN, EnableReg, EnableBit, 0); // Clear Watchdog Timeout Status WDTClearTimeoutStatus(); // WDT relative parameter setting WDTParameterSetting(); VOID WDTEnableDisable(byte LDN, byte Register, byte BitNum, byte Value){ SIOBitSet(LDN, Register, BitNum, Value);...
  • Page 108 ************************************************************************************ VOID SIOEnterMBPnPMode(){ Switch(SIOIndex){ Case 0x2E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0x55); Break; Case 0x4E: IOWriteByte(SIOIndex, 0x87); IOWriteByte(SIOIndex, 0x01); IOWriteByte(SIOIndex, 0x55); IOWriteByte(SIOIndex, 0xAA); Break; VOID SIOExitMBPnPMode(){ IOWriteByte(SIOIndex, 0x02); IOWriteByte(SIOData, 0x02); VOID SIOSelectLDN(byte LDN){ IOWriteByte(SIOIndex, 0x07); // SIO LDN Register Offset = 0x07 IOWriteByte(SIOData, LDN);...
  • Page 109 ************************************************************************************ VOID SIOBitSet(byte LDN, byte Register, byte BitNum, byte Value){ Byte TmpValue; SIOEnterMBPnPMode(); SIOSelectLDN(byte LDN); IOWriteByte(SIOIndex, Register); TmpValue = IOReadByte(SIOData); TmpValue &= ~(1 << BitNum); TmpValue |= (Value << BitNum); IOWriteByte(SIOData, TmpValue); SIOExitMBPnPMode(); VOID SIOByteSet(byte LDN, byte Register, byte Value){ SIOEnterMBPnPMode();...

  • Page 110: Appendix B - I/O Information

    Appendix B Appendix B - I/O Information...

  • Page 111: I/O Address Map

    I/O Address Map Appendix B – I/O Information...
  • Page 112 Appendix B – I/O Information...

  • Page 113: Memory Address Map

    Memory Address Map Appendix B – I/O Information...
  • Page 114 Appendix B – I/O Information...

  • Page 115: Irq Mapping Chart

    IRQ Mapping Chart Appendix B – I/O Information...
  • Page 116 Appendix B – I/O Information...
  • Page 117 Appendix B – I/O Information...
  • Page 118 Appendix B – I/O Information...
  • Page 119 Appendix B – I/O Information...
  • Page 120 Appendix B – I/O Information...
  • Page 121 Appendix B – I/O Information...
  • Page 122 Appendix B – I/O Information...
  • Page 123 Appendix B – I/O Information...
  • Page 124 Appendix B – I/O Information...
  • Page 125 Appendix B – I/O Information...
  • Page 126 Appendix B – I/O Information...
  • Page 127 Appendix B – I/O Information...

  • Page 128: Appendix C - Standard Lan Bypass Platform Setting

    Appendix C Appendix C - Standard LAN Bypass Platform Setting...

  • Page 129: Status Led

    Status LED Table1: LED Status STA_LED2 STA_LED1 STA_LED0 LED Off Red LED On Red LED Blink Red LED Fast Blink Reserved Green LED Blink Green LED Fast Blink Green LED On Table2: Status LED and register mapping table CPLD Slave Address 0x90 (Note1) Attribute Offset(SMBUS) BitNum...
  • Page 130 Sample Code: ***************************************************************************************** #define Byte CPLD_SLAVE_ADDRESS //This parameter is represented from Note1 #define Byte OFFSET //This parameter is represented from Note2 ***************************************************************************************** bData = aaeonSmbusReadByte(CPLD_SLAVE_ADDRESS, OFFSET); switch( LED_FLAG) case 0: //LED Off //BIT2=0, BIT1=0, BIT0=0 bData = bData & 0xF8; break;...
  • Page 131 bData = (bData & 0xF8) | 0x07; break; case 5: //Green LED Blink //BIT2=1, BIT1=0, BIT0=1 bData = (bData & 0xF8) | 0x05; break; case 6: //Green LED Fast Blink //BIT2=1, BIT1=1, BIT0=0 bData = (bData & 0xF8) | 0x06; break;...

  • Page 132: Lan Bypass

    LAN Bypass Table1: LAN Kit ID Select LAN_ID3 LAN_ID2 LAN_ID1 LAN_ID0 LAN kit selected LAN Kit 1 Selected LAN Kit 2 Selected LAN Kit 3 Selected LAN Kit 4 Selected LAN Kit 5 Selected LAN Kit 6 Selected LAN Kit 7 Selected LAN Kit 8 Selected LAN Kit 9 Selected LAN Kit 10 Selected...
  • Page 133 behavior to LAN kit, when WDT triggered. 0: Normal WDT reset (Default) 1: Force Bypass Use for activating programming of LAN kit. It is edge triggering (falling edge 1 to ACT_EN 0) and should be set to high(1) as its normal state.
  • Page 134 bData = bData | 0x04; else bData = bData & 0xFB; // Set Reg01h bit1 if(bLanSel & 0x02) bData = bData | 0x02; else bData = bData & 0xFD; // Set Reg01h bit0 if(bLanSel & 0x01) bData = bData | 0x01; else bData = bData &...

  • Page 135: Software Reset Button (General Propose Input)

    Software Reset Button (General Propose Input) Table 1: Soft Reset Button register mapping table Attribute Register(I/O) BitNum Value BTN_STS 0xA05(Note1) 4(Note2) (Note3) Table 2: LAN Bypass register table Function Description Reading this register returns the pin level status which is normal high active low.

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