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Introduction
This document is an update of LLRF4 documentation packet, describing up-to-date in-
formation on 2013 LLRF4.6 revision of the board. The main difference between LLRF4
(last revision 4.2, dated 2009-06-28) and LLRF4.6 is the FPGA. The updated board uses
Spartan-6 FPGA in CS324 package. Normally, the boards are assembled with the largest
and fastest part fitting the footprint — XC6SLX45-3CSG324. While smaller parts can be
used, there is little rationale to do so.
Besides the component changes, several new or improved features have been incorporated:
• Transition from Spartan-3 XC3S1000 to Spartan-6 XC6SLX45;
• New FPGA core supply switcher capable of 2.5 A;
• Power supply jumpers replaced by zero ohm resistors;
• Maximally flat PCB backside for thermal pad mounting on cold plate;
• Reduced parasitics on RF/IF inputs
• High quality stripline LO distribution network, capable of 3 GHz;
• LO 1:8 splitter works to 3.4 GHz;
• LVDS signals routed as 100 Ω differential lines;
• LVDS termination resistors deleted;
• DS1822 thermometer in TO-92 replaced by DS18B20 in SO-8;
• Improved input channel shielding assembly.
The rest of this paper walks through these changes in detail.
FPGA
LLRF4.6 transitions to a more modern Xilinx FPGA. The part is also slightly faster
than the old Spartan-3. A short summary of differences between the two parts is shown
below. Of course, logic cells comparison is imprecise, since Spartan-6 uses new 6-input
LUT architecture. Xilinx uses some fudge factors to convert slice counts to vague "logic
cells".
Logic cells
Multipliers
BlockRAM
One quirk of LLRF4.6 FPGA setup is that two data bits on high-speed DAC interface are
driven by dual function pins R15 (IO L1P CCLK 2) and V10 (IO L30N GCLK0 USERCCLK 2).
The bitfile must be generated with startup clock set to CCLK (-g StartUpClk:CClk
option of bitgen) for these pins to function as user outputs.
LLRF4.6 Evaluation Board
Dmitry Teytelman
July 7, 2014
XC3S1000
XC6SLX45
17280
24
24
Notes
43661
58
DSP48A1 in S6
116
18kbits
1

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Summary of Contents for Dimtel LLRF4.6

  • Page 1 BlockRAM 18kbits One quirk of LLRF4.6 FPGA setup is that two data bits on high-speed DAC interface are driven by dual function pins R15 (IO L1P CCLK 2) and V10 (IO L30N GCLK0 USERCCLK 2). The bitfile must be generated with startup clock set to CCLK (-g StartUpClk:CClk...
  • Page 2 RF/LO Subsystem At the RF input, parallel LC matching network was removed (never used on the original LLRF4, layout considerations). LO 1:8 power splitter (4 input mixers, 2 output mixers, power monitor, monitor connector) is now built from 7 Mini-Circuits QCN-series quadrature splitters. These parts cover the range from 220 MHz to 3.4 GHz in multiple bands.
  • Page 3 Many different IF filter designs have been developed for the original LLRF4. Most of these should work well with LLRF4.6. Some have already been updated and tested on the revised board — see the table below. CF is center frequency, BW is the bandwdith, level refers to the bandwidth measurement level (drop in dB from the peak).
  • Page 4: Power Supplies

    MAX1820X) provides for more a flexible FPGA divide ratio. Another power supply related change in LLRF4.6 is the deletion of 8 power output jumpers. These made sense early on, but not at serial numbers above 100. Jumpers have been replaced by zero ohm 0603 parts, so the regulators can still be disconnected from the loads, if necessary.
  • Page 5: Connector Summary

    LVDS inter-board communication Since Spartan-6 supports internal differential termination for LVDS, on-board termination resistors have been deleted. Direction and termination options can be specified in HDL code now. Unfortunately, Xilinx does not support bi-directional LVDS I/O with runtime termination control. So the bit files have to explicitly define inputs and outputs, enabling termination for the inputs.
  • Page 6 Top Level LBNL LLRF Digital Board V4.6 Page 1/10 Larry Doolittle, LBNL 2013-08-13 Dmitry Teytelman, Dimtel Flex LO Dist IN0OVR IN2OVR IN0D13 IN2D13 IN0D12 IN2D12 IN0D11 IN2D11 RF Input RF Input IN0D10 IN2D10 IN0D9 IN2D9 IN0D8 IN2D8 IN0D7 IN2D7 IN0D6...
  • Page 7 LBNL LLRF Digital Board V4.6 Page 2/10 Larry Doolittle, LBNL 2013-08-13 C118 C114 C115 C116 2.2 µF 0.1 µF 0.1 µF 0.1 µF Dmitry Teytelman, Dimtel MODE RN101 78 MHz ADT16-1T 1.0 V F.S. diff. peak-peak T101 LTC2249 L103 C107 C108 680 nH 10.0 pF...
  • Page 8: Usb Interface

    USB Interface LBNL LLRF Digital Board V4.6 Page 3/10 Larry Doolittle, LBNL 2013-08-13 Dmitry Teytelman, Dimtel +3.3VD C622 2.2 µF 0.1 µF 0.47 µF 0.1 µF +3.3VD +3.3VD Type Type 82.5 kΩ AVCC 4.75 kΩ XC6SLX45-CS324 CY7C68013A-LF56 0.47 µF DSPCLK...
  • Page 9 2.2 µF 10 nF C601 2.2 µF Voltage Regulators LBNL LLRF Digital Board V4.6 Page 4/10 Larry Doolittle, LBNL 2013-08-13 TPS79530 Dmitry Teytelman, Dimtel (NC) U602 214 mA nominal EN V GND V BYPASS supplies 2 x ADC 3.0V2 C605 C606 2.2 µF...
  • Page 10 FPGA Power Capacitors LBNL LLRF Digital Board V4.6 Page 5/10 Larry Doolittle, LBNL 2013-08-13 Dmitry Teytelman, Dimtel +2.5VD 0.47 µF 0.47 µF 0.47 µF 0.47 µF 0.47 µF 0.47 µF 0.47 µF 0.47 µF +1.2VD C623 0.47 µF 0.47 µF 0.47 µF...
  • Page 11 RF Output Channels LBNL LLRF Digital Board V4.6 Page 6/10 Larry Doolittle, LBNL 2013-08-13 Dmitry Teytelman, Dimtel C625 0.1 µF 0.1 µF 2.2 µF +3.3VD +3.3VA ISL5927 QOUTA 100 pF QOUTB ADT1-1WT QCOMP SYM-25DMHW Full scale output current QD10 QD10...
  • Page 12: Clock Distribution

    Clock Distribution LBNL LLRF Digital Board V4.6 Page 7/10 Larry Doolittle, LBNL 2013-08-13 Dmitry Teytelman, Dimtel 3.3VA C626 2.2 µF 0.47 µF 0.47 µF 0.1 µF 0.47 µF 0.1 µF 0.1 µF 0.47 µF 0.47 µF ICS83940D 124 Ω 124 Ω...
  • Page 13 Housekeeping LBNL LLRF Digital Board V4.6 Page 8/10 +3.3VA Larry Doolittle, LBNL 2013-08-13 Dmitry Teytelman, Dimtel IMON C807 R808 L801 +3.3VA+3.3VA 220 pF 221 kΩ 22 nH ADC_CLK MCP3208 ADC_SDO ADC_SDI (SO-16) 30-2500 MHz from SMA ADC_CS U801 R811 221 Ω...
  • Page 14 LO Distribution LBNL LLRF Digital Board V4.6 Page 9/10 MiniCircuits QCN Larry Doolittle, LBNL 2013-08-13 Dmitry Teytelman, Dimtel Term R818 49.9 Ω MiniCircuits QCN Term R817 MiniCircuits QCN 49.9 Ω Term R819 49.9 Ω MiniCircuits QCN MiniCircuits QCN Term R816 49.9 Ω...
  • Page 15 Interlock Input/Output LBNL LLRF Digital Board V4.6 Page 10/10 Larry Doolittle, LBNL 2013-08-13 Dmitry Teytelman, Dimtel Weidmuller P/N 172863 (WIED6) RF_PERMIT (SOT23) MMBD914 +3.3V R705 2.21 kΩ R702 C701 D702 Rear 82.5 kΩ 47 pF HCPL-060L Panel Got_OK U701 Mount...
  • Page 16 LLRF4, top, scale = 1:1.000 llrf4.pcb...
  • Page 17 LLRF4, bottom (mirrored), scale = 1:1.000 llrf4.pcb...
  • Page 18 LLRF4, topassembly, scale = 1:1.000 llrf4.pcb...
  • Page 19 LLRF4, bottomassembly (mirrored), scale = 1:1.000 llrf4.pcb...
  • Page 20 LLRF4, fab, scale = 1:1.000 llrf4.pcb...