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Danville Signal Processing, Inc.
dspblok™ 21469
FLASH
CORE PS
EEPROM
DDR2
60.00 [2.36]
ADSP-21469
JTAG
60.00 [2.36]

User Manual

Version 1.11

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Summary of Contents for Danville Signal Processing dspblok 21469

  • Page 1: User Manual

    Danville Signal Processing, Inc. dspblok™ 21469 FLASH CORE PS EEPROM DDR2 60.00 [2.36] ADSP-21469 JTAG 60.00 [2.36] User Manual Version 1.11...
  • Page 2: Contact Information

    Danville Signal Processing, Inc. Danville Signal Processing, Inc. strives to deliver the best product to our customers. As part of this goal, we are constantly trying to improve our products. Danville Signal Processing, Inc., therefore, reserves the right to make changes to product specification or documentation without prior notice.
  • Page 3: Table Of Contents

    JH4 – Power & Clock ..........................12 JH5, JH7 – Data Bus ..........................13 JH6 – Link Port ............................13 JH8 – dspBootloader Mode........................13 Mechanical Dimensions (dspblok 21469)..............14 Mechanical Dimensions (dspblok 21469+ICE)............15 Schematic.......................15 Product Warranty ....................16 RoHS & WEEE Compliance..................17 dspblok™...
  • Page 4: Overview

    Overview Danville Signal's dspblok™ family of products delivers the power of digital signal processing in a small 60mm x 60mm form factor. Connections are brought out to standard 2mm dual row headers. The dspblok reduces development costs, risk and time. Danville’s dspblok DSP function modules are often incorporated directly into larger custom embedded systems.
  • Page 5: Intended Audience

    The dspblok 21469 requires an understanding of the Analog Devices’ ADSP-21469 and the associated tools used for development. If the dspblok 21469 is going to be integrated into a larger hardware design, then it is also assumed that the user is familiar with basic hardware design. In most cases, systems integrators, DSP programmers and software engineers can create DSP embedded systems using our embedded dspblok systems (or dspstak family) without the need for additional hardware design and manufacturing.
  • Page 6 21469 with an external ADI ICE : Start your development with a dspblok 21469 module. In this case, you will want to connect to the dspblok 21469via an external Analog Devices emulator. Analog Devices offers two versions the USB- ICE and the HPUSB-ICE.
  • Page 7 • Emulator or Debug Agent (one of the following) • Analog Devices HPUSB-ICE and Danville JTAG Adapter P/N A.08153 • Danville dspblok 21469+ICE • Optional: Danville dspFlash Blackfin & SHARC Programmer • Our website (www.danvillesignal.com) has downloads and links to these tools and documents.
  • Page 8 The dspblok 21469+ICE includes the following items: FLASH CORE PS Hardware: EEPROM dspblok 21469+ICE Module • DDR2 USB Cable • Software: ADSP-21469 VisualDSP++ 5.0 for SHARC (KIT • license) CD Documents (CD): 115.00 [4.53] This Manual • CAD footprints (Gerber & Altium •...
  • Page 9: Hardware Overview

    1.1V to the ADSP-21469. DO NOT use a higher voltage supply for the core supply input (JH4-Vdd). A single 3.3V supply is all that is required to power the dspblok 21469, but in some cases, a 5V supply may be more convenient. The DSP I/O and Memory supply must be 3.3V.
  • Page 10 room temperature. The Analog Devices’ ADSP-21467/ADSP-21469 SHARC Processor Data Sheet has an excellent section on estimating power consumption of the DSP. Please note that the measurements do not take into account the increase static current as temperature rises. Typical Power Consumption at Room Temperature Core Continuous Mixed...
  • Page 11: Memory

    MS0#, which is not available because its address is assigned to DDR2_CS#. The dspblok 21469 uses a 1Gb (64M x 16) DDR2 DRAM. DDR2 memory is much faster and typically much larger than older SDRAM. PC board layout is non trivial. The dedicated DDR2 interface of the ADSP-21469 has been carefully laid out with respect to trace length, signal integrity, and bus isolation so that the DDR2 operates reliably at maximum speed.
  • Page 12: Clocks

    ADSP-21469 power-up clock configuration to be set. Link Ports The dspblok 21469 has two link ports available that can be used to interface to additional dspblok 21469 boards or may be used to connect to other external devices such as FPGAs.
  • Page 13: Connections

    Connections Description Description Description JTAG DAI, DPI, IO Configuration 1 EMUSEL 1 GND 1 GND Note 4 2 EMU 2 DPI8/IO0/SS1# 2 BOOTCFG0 Note 1 Note 2 3 Key (No Pin) 3 DPI4/IO1/SS2# 3 Vd+3.3 Note 4 4 GND 4 DPI13/IO2/SS3# 4 BOOTCFG1 Vd+3.3 Mon 5 DPI14/IO3/SS4#...
  • Page 14 40 GND Description Description Description Data Bus Address Bus Link Port Note 9 Note 9 1 NC 1 NC 1 L0DAT0 Note 9 Note 9 2 NC 2 NC 2 L0DAT1 Note 9 Note 9 3 NC 3 NC 3 L0DAT2 Note 9 4 NC 4 A23...
  • Page 15: Connector Recommendations & Notes

    JTAG chaining applications. Danville has an ADI JTAG adapter available (P/N A.08153). The dspblok 21469+ICE omits JH1 since the debugger is on-board. If you want to use an external emulator or the Danville dspFlash Blackfin & SHARC Programmer, you may remove the ADI Debugger and use the JTAG connection provided below the debugger.
  • Page 16: Jh5, Jh7 - Data Bus

    This is also why there are unused pins on JH5. If you are adapting a dspblok 21369zx design to support the dspblok 21469, you should verify that these changes will not impact your design. In most cases, this will not be an issue.
  • Page 17: Mechanical Dimensions (Dspblok 21469)

    Mechanical Dimensions (dspblok 21469) 46.00 [1.81] 28.00 [1.10] Top Side 60.00[2.36] 57.00 [2.25] 44.00 [1.73] 24.00 [0.94] 26.00 [1.02] 52.00 [2.05] 57.00 [2.24] 60.00 [2.36] Holes 2.3 [0.090] (4 places) Bottom Side 55.00[2.17] 55.00 [2.17] Mounting holes are equidistant from the center of the dspblok. These holes are 2.3mm in diameter, suitable for 2-56 or M2 screws.
  • Page 18: Mechanical Dimensions (Dspblok 21469+Ice)

    Analog Devices' Debug Agent 60.00 [2.36] The dspblok 21469+ICE board has identical mounting holes and mating connections as the production dspblok 21469. Two additional mounting holes are provided for support as shown. The debugger portion of the dspblok 21469+ICE is USB bus powered.
  • Page 19: Product Warranty

    If Danville Signal Processing receives notice of such defects during the warranty period, Danville Signal Processing shall, at its option, either repair or replace software media or firmware, which do not execute their programming instructions due to such defects.
  • Page 20: Rohs & Weee Compliance

    Military, medical and some other products are also exempt. We suggest that you make an appropriate assessment concerning your products. The dspblok 21469 is RoHS compliant. The dspblok 21469 is a subcomponent of a larger system; therefore it is not subject to the WEEE directive EU Directive 2002/96/EC. dspblok™ 21469 User Manual...

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