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TMM1000
HARDWARE MANUAL
2003/07/04

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Summary of Contents for TOWA MECCS TMM1000

  • Page 1 TMM1000 HARDWARE MANUAL 2003/07/04...
  • Page 2: Table Of Contents

    INDEX 1. Introduction..........................1 1-1. Outline ..........................1 1-2. Features..........................1 1-3. Specifications ........................2 1-4. Composition......................... 3 2. I/O ..............................4 2-1. Memory, I/O map........................4 2-2. Detailed I/O area ........................5 2-3. IRQ ............................5 2-4. I/O built-in CPU ........................6 3.
  • Page 3: Introduction

    1. Introduction 1-1. Outline TMM-1000 is the CPU board for installing in the device, in which HITACHI CPU SH3 (HD6417709S) microcomputer is adopted. It includes LAN, USB and a storage medium (compact flash), and has scalability. By using it, it has become possible to make a deep cut of man-hour for development of similar control boards, and to realize easily sophisticated application software such as TCP/IP with utilizing high grade OS such as LINUX, etc.
  • Page 4: Specifications

    1-3. Specifications CPU: HD6417709SF133B Working speed: CPU clock: 133.32MHz CPU IO: 33.33MHz Bus clock: 66.66MHz Memory: Boot: F-EP ROM, 4M Byte (Max. 32M Byte) D-RAM: S-DRAM, 32M Byte (Max 128M Byte) S-RAM: S-RAM, 512K Byte (Optional) Display: For NEC LCD panel (640 x 480) IF S1D13508F00A100 EPSON LAN: 100/10BaseT X 1ch LAN91C111 SMSC...
  • Page 5: Composition

    1-4. Composition Expansion terminal Ether-net S-RAM SDRAM F-EP ROM VIDEO CONTROL LAN91C11 512Kbyte 32Mbyte 4Mbyte S1D13806 SH3 133M PN12 PN10 PN16 Ext Power PN15 Other Optional PN17 PN18 PN13 PN19 PN11 PN14 COM1 COM2 COM0 Touch Panel Speaker...
  • Page 6: I/O

    2. I/O I/O in the board is composed with built-in I/O in CPU and I/O added outside. Even if a sub-board does not exist when initializing, the movement for initializing is executed to IC's installed in the sub-board. In the manual, it is explained on CPU board only. CPU has DMA function, but it cannot be used on the board.
  • Page 7: Detailed I/O Area

    2-2. Detailed I/O area Address 0x10000000 to 0x10000100 Multi-purpose I/O (LCA) 0x11000000 to 0x111FFFFF USB controller NOTE 1 0x12000000 to0x121FFFFF Video controller 0x12200000 to 0x1233FFFF Video memory (effective for 1280K byte) 0x13000000 to 0x132FFFFF LAN controller (NOTE 1) Consecutive addresses are not used on IC accessing in 8-bit unit. In case of accessing to a register, access to even numbered addresses.
  • Page 8: I/O Built-In Cpu

    2-4. I/O built-in CPU I/O’s built-in SH3-CPU are connected with the following terminals: Function CPU terminal Connecter(s) COM 0 RXD0 TXD0 PN11 COM 1 RXD2 TXD2 CTS2 RTS2 PN17 PN18 COM 2 RXD1 TXD1 PN13 PN19 Speaker TCK /TRST TD0 /ASEBREAK TMS HUDI TDI /ASEM0 /RESET AD0 AD1 AD2 AD3...
  • Page 9: I/O Terminals

    3. I/O terminals PN1 Compact flash connector (/dev/had) Signal Function Direction Signal Function Direction Signal GND 26 CD1 Detect Data bus 27 D11 Data bus Data bus 28 D12 Data bus Data bus 29 D13 Data bus Data bus 30 D14 Data bus Data bus 31 D15...
  • Page 10 PN2 Expansion connector Signal Function # Signal Function A1 GND Signal GND B1 GND Signal GND A2 GND Signal GND B2 GND Signal GND A3 VCC_5 VCC5V B3 VCC_5 VCC5V A4 VCC_5 VCC5V B4 VCC_5 VCC5V A5 VCC_3.3 VCC3.3V B5 CADD0 Address bus A6 VCC_3.3 VCC3.3V...
  • Page 11 A35 IRQSUB1 IRQ 1 B35 NC Reserved A36 IRQ5 IRQ 5 B36 CS2 Reserved A37 IRQ6 IRQ 6 B37 DREQ0 DMA (Do not use) A38 IRQ7 IRQ 7 B38 DREQ1 DMA (Do not use) A39 HRES Reset output B39 DRAK1 DMA (Do not use) A40 NC B40 DRAK0...
  • Page 12 PN6 Reset input Signal Function /RESET Open collector /RESET PN7 Audio output ( /dev/da0 ) Signal Function SIGNAL Audio output Signal GND PN9 JTAG I/F for debugging Signal Function Signal Function Clock Signal GND TRST H-UDI reset Signal GND Data output Signal GND...
  • Page 13 PN10 LCD output Signal Function Signal Function Signal GND sift Shift clock line Line clock flame Frame clock Signal GND FPDAT17 Signal line FPDAT10 Signal line Signal line FPDAT9 Signal line 10 FPDAT1 Signal line FPDAT2 Signal line 12 GND Signal GND...
  • Page 14 PN11 POS keyboard connector ( /dev/ttySC0 ) Signal Function VCC_3.3 VCC 3.3V RXD0 Receive data(TTL3.3v) TXD0 Transmit data(TTL3.3v) Signal GND PN12 USB terminal Signal Function VCC5V DATA+ Signal line DATA- Signal line Signal GND PN13 POS customer display connector (/dev/ttySC2) Signal Function VCC_5...
  • Page 15 PN15 Expansion connector 2 Signal Function Signal Function Signal GND 2 CD1 Detect Data bus 4 D11 Data bus Data bus 6 D12 Data bus Data bus 8 D13 Data bus Data bus 10 D14 Data bus Data bus 12 D15 Data bus 13 CE1 Selection signal...
  • Page 16 PN16 10/100 BASE-T LAN terminal ( /dev/eth0 ) Signal Function Sending + Sending - Receiving + Signal GND Signal GND Receiving- Signal GND Signal GND PN17 Standard input/output serial connector (/dev/ttySC1) Signal Function Signal Function Data terminal ready (Not used) Data set ready (Not used) Receive data Request to send...
  • Page 17 Serial connector (/dev/ttySC2) Mutually exclusive use with PIN13 PN19 PIN # differs to usual. Sign Sign Function Function DCD Data terminal ready (Not used) DSR Data set ready (Not used) RxD Receive data RTS Request to send TxD Transmit data CTS Clear to send DTR Data terminal ready Ring indicator (Not used)
  • Page 18: Lan-Led Display

    4. LAN-LED display IC12 Display of LED is programmed as follows: LAN-LED Color Function Upper Green Power supply indication: Lighting when 5V power is supplied. Middle Red LAN: Built up the link at 100MBps or 10MBps. Lower Red LAN: Packet sent or received -16-...
  • Page 19 Inquiry TOWA MECCS CORPORATION Market development headquarters Corporation marketing Dept Persons in charge:Masuda and Sasaoka TEL:81-3-3816-7864 E-mail:info@towa-meccs.co.jp We renew detailed information in our home page from time to time. ■ SH Board TMM1000 http://www.towanet.com/seihin/sh_board/index.html ■ TOWA MECCS CORPORATION http://www.towa-meccs.co.jp -17-...

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