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Tern R-Engine-D Technical Manual

16-bit controller with 16-bit sram & flash, ethernet interface, compact flash interface with file system support, adc/dac based on the 40mhz am186er or 80mhz rdc r1100
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R-Engine-D
™
16-bit Controller with 16-bit SRAM & Flash, Ethernet Interface,
Compact Flash interface with file system support, ADC/DAC
based on the 40MHz Am186ER or 80MHz RDC R1100
Technical Manual
1724 Picasso Avenue, Davis, CA 95616-0547, USA
Tel: 530-758-0180
Fax: 530-758-0181
Email: sales@tern.com
http://www.tern.com

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  • Page 1 R-Engine-D ™ 16-bit Controller with 16-bit SRAM & Flash, Ethernet Interface, Compact Flash interface with file system support, ADC/DAC based on the 40MHz Am186ER or 80MHz RDC R1100 Technical Manual 1724 Picasso Avenue, Davis, CA 95616-0547, USA Tel: 530-758-0180 Fax: 530-758-0181 Email: sales@tern.com...
  • Page 2 TERN and the Buyer agree that TERN will not be liable for incidental or consequential damages arising from the use of TERN products. It is the Buyer's responsibility to protect life and property against incidental failure.

  • Page 3: Chapter 1: Introduction

    This technical manual will require special organization to accommodate the possibility of configuring the R-Engine-D with two different CPUs. The CPUs are very similar, yet they do have a few differences. For purposes of organization, it will be assumed that throughout this technical manual, all information given is accurate for both CPUs, unless otherwise stated.
  • Page 4 The DAC (DAC7612) supports two channels of 12-bit, 0-4.095V analog voltage outputs capable of sinking or sourcing 5 mA. Two of these are available to be installed on the R-Engine-D. A high-speed, up to 300K samples per second, 8-channel, 12-bit parallel ADC (AD7852) can be installed. This ADC includes sample-and-hold and precision internal reference, and has an input range of 0-5 V.

  • Page 5: Physical Description

    • 512-byte serial EEPROM • Supervisor chip (691) for reset and watchdog • Real-time clock (DS1337), lithium coin battery* * = optional 1.4 Physical Description The physical layout of the R-Engine-D is shown below. SER0 +12V (Debug serial port) Input...
  • Page 6 Chapter 1: Introduction R-Engine-D Power On or Reset Step 2 jumper STEP 2 set? Go to Application Code CS:IP CS:IP in EEPROM: 0x10=CS high byte 0x11=CS low byte STEP 1 0x12=IP high byte ACTF menu sent out through ser0 0x13=IP low byte at 19200 baud Figure 1.2 Flow chart for ACTF operation...

  • Page 7: R-Engine-D Programming Overview

    9. Debug kernel running, ready to download Step 1: Debug Mode 1. Launch Paradigm C/C++ 2. Open “rd.ide” in the tern\186 directory 3. Run samples 4. Use samples to build application in C/C++ 5. Single step, set breakpoints, debug code 6.

  • Page 8: Minimum Requirements For Rd System Development

    TERN EV-P Kit installation CD and a PC running: Windows 95/98/NT/2000/XP With the EV-P Kit, you can program and debug the R-Engine-D in Step One and Step Two, but you cannot run Step Three. In order to generate an application Flash file and complete a project, you will need the...

  • Page 9: Chapter 2: Installation

    Hardware installation for the R-Engine-D consists primarily of connecting the microcontroller to your PC and to power. The green screw terminal, T1, is used to supply unregulated +12V DC to the R-Engine-D, while the 5x2 pin header, H2, is used to connect the debug serial port to your PC.
  • Page 10 Chapter 2: Installation R-Engine-D Power Jack Red Edge of debug Adapter Output of wall T1 Screw cable aligned with transformer Terminal Pin 1 of H2 GND +12V...

  • Page 11: Chapter 3: Hardware

    3.1 Am186ER RDC R1100 The R-Engine-D is compatible with two different CPUs. Both offer and support the same on-board peripherals as well as the on the CPU itself, aside from a few differences. The Am186ER, from AMD, uses times-four crystal frequency, while the R1100, from RDC, uses times-eight. The R-Engine-D uses a 10MHz system clock, giving the Am186ER a CPU clock of 40MHz and the R1100 a CPU clock of 80MHz.

  • Page 12: Asynchronous Serial Port

    Dual UART. /INT0 should not be used by application unless SER1 and SER2 ar e not being used. The R-Engine-D uses vector interrupt functions to respond to external interrupts. Refer to the Am186ER User’s manual for information about interrupt v ectors.
  • Page 13 When an interrupt occurs, it automatically returns to its normal operating frequency. The DS1337 on the R-Engine-D has a VOFF signal routed to J1 pin 9. VOFF is controlled by the battery- backed DS1337. The VOFF signal can be programmed by software to be in tri-state or to be active...

  • Page 14: Am186Er Pio Lines

    After power-on/reset, PIO pins default to various configurations. The initialization routine provided by TERN libraries reconfigures some of these pins as needed for specific on-board usage, as well. These configur ations, as well as the processor-internal peripheral usage configurations, are listed below in Table 3.1.
  • Page 15 (1); return 16-bit status of P16-P31, if corresponding pin is in input mode, Some of the I/O lines are used by the R-Engine-D system for on-board components (Error! Reference source not found.). We suggest that you not use these lines unless you are sure t...

  • Page 16: I/O Mapped Devices

    0x0300-0x03ff /PCS3 J2 pin 31=P19 USER 0x0400-0x04ff /PCS4 Reserved 0x0500-0x05ff /PCS5 J2 pin 15=P3 SCC26C92 0x0600-0x06ff /PCS6 J2 pin 27 = P2 USER *PCS0 may be use d for other TERN eriphera boards, such as F C-0, P50, P100, MM-A.

  • Page 17: Programmable Peripheral Interface (82C55A)

    R-Engine-D Chapter 3: Hardware To illustrate how to interface the R-Engine-D with external I/O boards, a simple decoding circuit for interfacing to an 82C55 parallel I/O chip is shown in Figure 3.2. 82C55 74HC138 P00-P07 /SEL20 /SEL40 /SEL60 /SEL20 P10-P17...
  • Page 18 S e l e c t Figure 3.3 Mode Select Command Word The R-Engine-D maps U5, the 82C55/uPD71055, at base I/O address 0x1A0. The ports/registers are offsets of this I/O base address. The command register = 0x1A6; Port 0 = 0x1A0; Port 1 = 0x1A2; Port 2 = 0x1A4.

  • Page 19: Real-Time Clock Ds1337

    Sample programs for the SCC2692 can be found in the c:\tern\186\samples\re directory. 3.7 Other Devices A number of other devices are also available on the R-Engine-D. Some of these are optional, and might not be installed on the particular controller you are using. For a discussion regarding the software interface for...

  • Page 20: On-Board Supervisor With Watchdog Timer

    This automatic assertion of /RESET may recover the application program if something is wrong. After the R-Engine-D is reset, the WDO remains low until a transition occurs at the WDI pin of the MAX691. When controllers are shipped from the factory the J9 jumper is off, which disables the watchdog timer.

  • Page 21: Dual 12-Bit Dac (Dac7612U)

    1LSB within 7µs. The DAC7612 uses a three wire serial interface to the CPU. The CPU on the R-Engine-D uses two output lines from the SCC26C92 and two lines from the Am186ER to drive the serial interface (Data In, Clock, Chip select and Latch Data) in an 8-lead SOIC package.

  • Page 22: Compact Flash Interface

    The DA7625 is a parallel 12-bit D/A converter. This device includes 4 voltage output channels with an output range of 0-2.5V. It accepts 12-bit parallel input data and has double-buffered DAC input logic. The R-Engine-D uses pins D15 to D4 to directly interface to the DAC’s full 12-bit data bus for maximum data transfer rate.

  • Page 23: High-Voltage, High-Current Drivers

    R-Engine-D Chapter 3: Hardware based RD can increase system efficiency and minimize CPU overhead in a 10BASE-T network. The RD with CS8900 provides a true full-duplex Ethernet solution, incorporating all of the analog and digital circuitry needed for a complete C/C++ programmable Ethernet node controller.

  • Page 24: Headers And Connectors

    Refer to the schematic at the end of this technical manual for complete signal definitions for all headers and connectors. Expansion Headers J1 and J2 There are two 20x2 0.1 spacing headers for R-Engine-D expansion. Most signals are directly routed to the Am186ER processor. 3-14...
  • Page 25 R-Engine-D Chapter 3: Hardware Figure 3.5 Pin 1 locations for RD headers J2 Signal J1 Signal RxDB TxD0 TxDB RxD0 VOFF /BHE TxDA RxDA /RST INT3 INT2 /INT0 /INT1 SCLK SDAT Table 3.3 Signals for J2 and J1, 20x2 expansion ports...

  • Page 26: Chapter 4: Software

    Implicit accesses to I/O and memory address space occur throughout your program from TERN libraries as well as simple memory accesses to either code or global and stack data. You can, however, explicitly access any address in I/O or memory space, and you will probably need to do so in order to access processor registers and on-board peripheral components (which often reside in I/O space) or non-mapped memory.

  • Page 27: Programming Overview

    This function can be used to retrieve data from components in I/O space. You will find that most hardware options added to TERN controllers are mapped into I/O space, since memory space is valuable and is reserved for uses related to the code and data. Using I/O mappings, the address is output over the address bus, and the returned 16 or 8-bit value is the return value.
  • Page 28 Sample programs found c:\tern\186\samples\ae c:\tern\186\samples\re and c:\tern\186\samples\rd directories. 4.1.1 Steps for RE based product development Preparation for Debugging • Connect RD to PC via RS-232 link, 19,200, 8, N, 1 • Power on RD without STEP 2 jumper installed •...
  • Page 29 Chapter 4: Software R-Engine-D The top 16KB ACTF boot strip is protected. Two utility HEX files, “l_debug.HEX” and “L_29F40R.HEX”, are designed for downloading into SRAM starting at 0x04000 with ACTF-PC-HyperTerminal. Use the “D” command to download, and use the “G”...

  • Page 30: R-Engine-D Initialization

    4.3.1 R-Engine-D Initialization ae_init This function should be called at the beginning of every program running on R-Engine-D core controllers. It provides default initialization and configuration of the various I/O pins, interrupt vectors, sets up expanded DOS I/O, and provides other processor-specific updates needed at the beginning of every program.
  • Page 31 = 15, I/O enable for 100+375 ns 4.3.2 External Interrupt Initialization There are up to six external interrupt sources on the R-Engine-D, consisting of five maskable interrupt pins (INT4-INT0) and one non-maskable interrupt (NMI). There are also an additional eight internal interrupt sources not connected to the external pins, consisting of three timers, two DMA channels, both asynchronous serial ports, and the NMI from the watchdog timer.
  • Page 32 (* nmi_isr)()); 4.3.3 I/O Initialization Two ports of 16 I/O pins each are available on the R-Engine-D. Hardware details regarding these PIO lines can be found in the Hardware chapter. Several functions are provided for access to the PIO lines. At the beginning of any application where you choose to use the PIO pins as input/output, you will probably need to initialize these pins in one of the four available modes.

  • Page 33: Timer Units

    4.3.4 Timer Units The three timers present on the R-Engine-D can be used for a variety of applications. All three timers run at ¼ of the processor clock rate, which determines the maximum resolution that can be obtained. Be aware that if you enter power save mode, the timers will operate at a reduced speed as well.

  • Page 34: Digital-To-Analog Conversion

    A 16-bit I/O read, inport(0x0140); will return the previous ADC conversion result, with only upper 12-bit data D15-D4 valid. A sample program rd_ad12.c demonstrating the use of the AD7852 is included in tern\186\samples\rd. This sample code is already included in the rd.ide project in the tern\186 directory.
  • Page 35 Serial DAC DAC7612 Two DAC7612 chips are available on the R-Engine-D in positions U15 and U17. The chips offer two channels, A and B, for digital-to-analog conversion. Details regarding hardware, such as pin-outs and performance specifications, can be found in the Hardware chapter.

  • Page 36: Other Library Functions

    R-Engine-D Chapter 4: Software 4.3.7 Other library functions On-board supervisor MAX691 or LTC691 The watchdog timer offered by the MAX691 or LTC691 offers an excellent way to monitor improper program execution. If the watchdog timer (J9) jumper is set, the function hitwd() must be called every 1.6 seconds of program execution.
  • Page 37 Chapter 4: Software R-Engine-D This function places a string of the current value of the real time clock in the char* realTime. The text string has a format of “year1000 year100 year10 year1 month10 month1 day10 day1 hour10 hour1 min10 min1 second10 second1”. For example” 19991220081020” presents year1999, december, , eight clock 10 minutes, and 20 second.

  • Page 38: Functions In Ser0.Obj

    SCC26C92 UART. SER1 and SER2 will be easier to implement in applications, as they can be directly debugged in the Paradigm C/C++ environment. TERN interface functions make it possible to use one of a number of predetermined baud rates. These baud rates are achieved by specifying a divisor for 1/16 of the processor frequency.
  • Page 39 Chapter 4: Software R-Engine-D Function Argument Baud Rate 115,200 250,000 500,000 1,250,000 Table 4.1 Baud rate values for ser0 only After initialization by calling s0_init(), SER0 is configured as a full-duplex serial port and is ready to transmit/receive serial data at one of the specified 15 baud rates.
  • Page 40 There is a data structure containing important serial port state information that is passed as argument to the TERN library interface functions. The COM structure should normally be manipulated only by TERN libraries. It is provided to make debugging of the serial communication ports more practical. Since it allows you to monitor the current value of the buffer and associated pointer values, you can watch the transmission process.
  • Page 41 Chapter 4: Software R-Engine-D This function initializes either SER0 with the specified parameters. b is the baud rate value shown in Table 4.1. Arguments ibuf and isiz specify the input-data buffer, and obuf and osiz specify the location and size of the transmit ring buffer.

  • Page 42: Functions In Ser1R.obj

    Miscellaneous Serial Communication Functions One thing to be aware of in both transmission and receiving of data through the serial port is that TERN drivers only use the basic serial-port communication lines for transmitting and receiving data. Hard ware flow control in the form of CTS (Clear-To-Send) and RTS (Ready-To-Send) is not implemented.
  • Page 43 Chapter 4: Software R-Engine-D Function Argument Baud Rate 28,800 4,800 9,600 19,200 38,400 57,600 115,20 Table 4.2 Baud rate val for SER1 and SE Unlike the other serial ports, DMA transfer is not used to fill the input buffer for SCC. Instead, an...
  • Page 44 The RS485 driver will echo back bytes sent to the SCC. As a result, assuming you are using the RS485 driver installed on another TERN peripheral board, you will need to disable receive while transmitting. While transmitting, you will also need to place the RS485 driver in transmission mode as well.
  • Page 45 Part of the EEPROM is reserved for TERN use specifically for this purpose. Addresses 0x00 to 0x1f on the EEPROM is reserved for system use, including configuration information about the controller itself, jump address for Step Two, and other data that is of a more permanent nature.

  • Page 46: Other Sample Code

    Chapter 4: Software 4.7 Other Sample code The following is a list of other sample code available for the R-Engine-D. Each will show an example plementation of the specific hardware and are located in the tern\186\samples\rd directory. Most can also be found in the rd.ide test project.

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