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Summary of Contents for BVM PMCDIO64
Page 1
Board Revision A Manual Revision B 04 April 2001 This material contains information of proprietary interest to BVM Ltd. It has been supplied in confidence and the recipient, by accepting this material, agrees that the subject matter will not be copied or reproduced, in whole or in part, nor its contents revealed in any manner or to any person except to meet the purposes for which it was delivered.
This User's Manual is intended for use by system integrators, service personnel, software engineers and end users. This User's Manual covers details of the PMCDIO64 only, which is one in a range of PMCDIO digital I/O and PMCCTR counter/timer I/O PMC modules from BVM.
Conforms to PMC standard IEEE P1386.1/Draft 2.3 9 October 2000. • Conforms to PCI Local Bus Specification Revision 2.2. Applications • Interfacing industrial equipment. • General purpose industrial I/O. • 32-bit or 64-bit data I/O. • Fail-safe control. Copyright 2000 BVM Ltd.
Two programmable Local-to-PCI interrupts. • Endian Byte Swapping. Note that not all of these features are pertinent to the PMCDIO64 - see section "A.1 PCI9030 PCI Interface (on page 17)" for further details of the device. Copyright 2000 BVM Ltd.
PMCDIO64 Main Logic The PMCDIO64 uses a Xilinx SpartanXL FPGA connected to the 16-bit local bus to provide the on- board logic functions as described below. 3.3.1 Input Register A 64-bit Input Register containing a latched version of the I/O pins on the logic device. The signal is latched by the 33MHz PCI clock.
- see section "5.2.2 LK9 to LK12 P5 Common Select (on page 9)" for further details. 93CS56 EEPROM The PMCDIO64 is fitted with a 93CS56 EEPROM which is supplied pre-programmed by BVM. The contents of this EEPROM are read by the PCI9030 on coming out of reset and are used to set up the control registers after reset, configuring the PCI interface configuration, PCI Device/Vendor ID's &...
(two on the front panel and two on the spacers). 4. There is no voltage keying on the PMCDIO64, it will work in both +3.3V and +5V host carriers. 5. The PMCDIO64 can be used with a BVM supplied connecting lead to standard 9-pin D-type connectors, or a user supplied alternative.
5.2.1 LK1 to LK8 I/O Pull-Up Enable The digital I/O signals to the PMCDIO64 may be pulled-up to +5V via 10KΩ resistor networks in groups of 8 if link selected. See the table below for link to I/O equivalence. LINK...
PMC I/O Board If required, a SCSI-III style lead can be used to connect to the BVM 8 Port PMC I/O Board from either the Front Panel Connector or the Rear I/O Connector providing 8 off 9 pin D-type connectors - see section "1.3 PMC I/O Board Part Numbers (on page 1)"...
A pre-programmed EEPROM contains the BVM PCI Vendor ID, which is 15C0 (hexadecimal) and the PCI Device ID, which is 02FF (hexadecimal) and the BVM PCI Subsystem Vendor ID, which is 15C0 (hexadecimal) and the PCI Subsystem Device ID, which is 0265 (hexadecimal).
7.3.6.8 Interrupt On Change-of-State Status (Bit 15: IOCST) This bit is set to 1 if any change flags are set after Interrupt On Change-of-State has been enabled. Writing a 1 clears all change flags. Copyright 2000 BVM Ltd.
BVM can supply a disc containing the driver files and example source code for Windows 98, NT4.0 and 2000 along with BVM installation files. The BVM installation files will ensure that the correct driver configuration is selected upon installation. Copyright 2000 BVM Ltd.
SN54ABT16245A, SN74ABT16245A 16-bit Bus Transceivers with 3-State Outputs, SCBS300E, March 1994, Revised March 1999. (http://www.ti.com) PMC Specification IEEE Draft Standard Physical and Environmental Layers for PCI Mezzanine Cards: PMC P1386.1/Draft 2.3 9 October 2000. (http://www.ieee.org) Copyright 2000 BVM Ltd.
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