Radio Shack 26-3801 Service Manual page 33

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Fig.
1
80C85 CPU FUNCTIONAL
BLOCK DIAGRAM
RSTS.S
C
9
AOg
C
17
AO« C
18
AO7
C
1»
Vss
C 20
*?
40
3
Vcc
39
3 HOLD
38 3 HLOA
37
3 CLK(OUT)
36
3 RESET
IN
35
3 HEADY
34 3 IO/M
33 3
Si
32
3 RD
31
3
WR
30
3 ALE
29 3
So
28
3 A15
27
3 All
26
3
A13
25 3 A
12
24
3 A11
23
3 A10
22
3 A9
21 3
Ag
Fig.
2
80C85 Pinout
Diagram
(a)
80C85
FUNCTIONAL
PIN
DESCRIPTION
-
The
following describes the
function of each
pin:
Symbol
A»
—
Ais
(Output,
3-state)
Function
Address Bus:
The most
significant 8 bits
of
the
memory
address
or the 8 bits
of the I/O address, 3-stated
during Hold and
Halt
modes
and during
RESET.
AD0-7
(Input/Output,
3-state)
Multiplexed
Address/Data
Bus:
Lower
8 bits
of the
memory
address (or
I/O address)
appear on the bus during
the
first
clock
cycle
(T
state)
of
a
machine
cycle.
It
then
becomes
the data bus
during the
second and
third
clock
cycles.
ALE
(Output)
Address Latch Enable:
It
occurs during the
first
clock
state
of
a
machine
cycle
and enables the address to get latched into the
on-chip latch of peripherals.
The
falling
edge of
ALE
is
set to
guarantee setup
and hold
times for
the address information.
The
falling
edge of
ALE
can also
be used
to
strobe the status
infor-
mation.
ALE
is
never
3-stated.