Summary of Contents for Lnk SLIMbus
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Page 1: User Manual
SLIMbus Audio Bridge User Manual SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 2: Table Of Contents
ASRC Configuration! 6.4. Audio Data Format! 6.5. Using the Value Elements! 6.6. Loop back mode! Bridge Specifications! Annex A - Presence Rate Compatibility Tables ! Annex B - Presence Rate Accuracy! SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 3: Presentation Of The Tool
The SLIMbus Audio Bridge makes the link between SLIMbus and the SPDIF / I2S legacy audio interfaces. The main purpose of the bridge is to allow easy tests of audio capabilities of a SLIMbus component with traditional audio analyzers (Audio Precision, PrismSound, Rhode&Swartz ...). - Page 4 Generic 0x01C1 0x0001 0x02 0x00 0x01C100010200 Component address = 1 Device Enumeration Address Interface 0x01C1 0x0001 0x00 0x01 0x01C100010001 Framer 0x01C1 0x0001 0x01 0x01 0x01C100010101 Generic 0x01C1 0x0001 0x02 0x01 0x01C100010201 SLIMbus Audio Bridge User Manual V0,9 - Draft Version!
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Page 5: Using The Tool
The input source is automatic. The bridge detects if there is a valid stream on the SPDIF input and switch to it. The automatic input selection only works when there is a SLIMbus clock present on the bridge and that there are at least 1 data port set as a source. Note that the SPDIF data are only streamed to the Ports 0 and 1. - Page 6 (they output data on SLIMbus) and they have an output presence rate (OPR) equal to 44,1kHz. Ports 3 and 4 are configured as sink port (they read data from SLIMbus) and they have an input presence rate equal to 48kHz.
- Page 7 PLL mode. The bridge does not have a frequency meter. When the source is either I2S or SMA, the value indicates the required clock frequency. It is the responsibility of the user to provide the right frequency. SLIMbus Audio Bridge User Manual V0,9 - Draft Version!
- Page 8 (Off). SLIMbus level shows the voltage used on the SLIMbus IO. It can be either 1.8V or 1.2V. Comp Address is the Instance Value of the bridge. It can be equal to 0 or 1. It allows two bridges to operate on the same SLIMbus.
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Page 9: Changing Parameters
6. Value Elements VE0=0 VE1=0 VE2=130 --,SDO2,0dB 2.1.8. Product Information The last page displays the product ID, the firmware revision of the SLIMbus IP and the controller code. 7. Product Info Model : I2S bridge FW Rev.: 1.0 IP Rev.: 1.0 2.2. -
Page 10: Resetting The Bridge
To reset the bridge while it is in operation, press the button for at least 4 seconds and release it. The controller will reboot and the SLIMbus interface will be hard reset. The bridge configuration is similar to a power ON. -
Page 11: Clock Management
2 different clock domains (digital audio / SLIMbus). The 2 clocks might not have any relationship, which could lead to data loss. The ASRC is the bridge between the 2 clock domains and is of such a high quality that the measured performances of the device under test will not be affected by the ASRC. -
Page 12: I2S Output Master Clock (Mclko)
MCLKO clock. In this case, the SLIMbus clock domain stops at the I2S OUT interface of the SLIMbus IP. It is the responsibility of the user to ensure that the clock structure of the complete setup is suitable for an error free transmission of the audio samples. -
Page 13: Framer Clock Source
27 MHz For proper operation of the audio master clock PLLs, the Root Frequency must be accurately set according to the SLIMbus specification and its value must be entered in the bridge (Framer BootRF parameter). SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 14: Error Cases
PLL settings, the “!” symbol is displayed after OPR and IPR to indicate that the PLL could not be set. I2S >ASRC24>SB>SDO2 P01234567 OPR!192k IIOO---- IPR!48k Err: Incompatible PR Running on external clocks will not have such limitations. SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 15: Incompatible Clock Gear
Err: ClkGear too low Running on external clocks will not have such limitations. However, the clock gear must be such that there is enough bandwidth in the SLIMbus to fit the desired data channels. SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 16: Bridge Connectivity
Not Connected 5.3. SPDIF IN / OUT Jack The SPDIF connector is a 3,5mm audio jack receptacle. Signal Name Pin Number Function SPDIF INPUT Input SPDIF OUTPUT Ring Output Sleeve Ground SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 17: I2S Input Hd15 Connector
SDIN2 Input SDIN3 Input SDIN4 Input 2, 4, 6, 7, 10, Ground 12, 14 The nominal signal level is equal to 3.3V. Maximum input level on Master Clock pin is 3.6V. SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 18: Analogue Output Jack
Ohms load must be comprised between 2V5 and 3V6. 5.8. SLIMbus connector The SLIMbus connector is a DIL6 male pin header (pitch spacing 2,54mm / 0,1”). It is located at the top of the case, in the lower left corner. -
Page 19: Slimbus Operations
When using the PLLs to generate the audio clocks, some care must be taken to ensure optimal data transmission and / or reception. The PLLs are configured once the associated Presence Rate is known. The SLIMbus IP communicates that information to the controller when a port is configured and when the associated channel structure and content have been defined by a valid reconfiguration... -
Page 20: Asrc Configuration
T h e d a t a f o r m a t i s s p e c i fi e d b y t h e D a t a Ty p e fi e l d v a l u e i n t h e NEXT_DEFINE_CONTENT message. SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 21: Using The Value Elements
Information at boot time. BOOT_RF[3:0] must use the coding BOOT_RF1 or the RF field as described in the SLIMbus specification. or the RF field as described in the SLIMbus specification. or the RF field as described in the SLIMbus specification. -
Page 22: Loop Back Mode
4 (going to source Port 6 and 7). • The I2S Output stream 4 (coming from sink Port 6 and 7) is routed to the I2S Input stream 3 (going to source Port 4 and 6). SLIMbus Audio Bridge User Manual V0,9 - Draft Version! -
Page 23: Bridge Specifications
Bit clock frequency 0,256 12,288 SPDIF IN /OUT Interface Parameter Typical Unit SPDIF IN signaling voltage SPDIF IN impedance Ohms SPDIF OUT signaling voltage SPDIF OUT impedance Ohms Sample Rate (input and output) SLIMbus Audio Bridge User Manual V0,9 - Draft Version! - Page 24 Signaling voltage Output impedance Ohms Frequency FRAMER Clock Input (SMA) Parameter Typical Unit Signaling voltage (source impedance = 0 Ohms) Signaling voltage (source impedance = 50 Ohms) Input impedance Ohms Frequency SLIMbus Audio Bridge User Manual V0,9 - Draft Version!
- Page 25 1:16 16:1 SLIMbus Electrical Performances Parameter Typical Unit Clock Gear range Operating frequency Signaling voltage Bus Hold impedance kOhms Clock and Data output impedance Ohms Clock and Data input capacitive load SLIMbus Audio Bridge User Manual V0,9 - Draft Version!
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Page 26: Annex A - Presence Rate Compatibility Tables
Root Frequency 1: 24,576 MHz Sample 176 88,2 44,1 22,1 Rate 176,4 88,2 44,1 22,05 11,025 Root Frequency 2: 22,5792 MHz Sample 176 88,2 44,1 22,1 Rate 176,4 88,2 44,1 22,05 11,025 SLIMbus Audio Bridge User Manual V0,9 - Draft Version! - Page 27 Root Frequency 3: 15,36 MHz Sample 176 88,2 44,1 22,1 Rate 176,4 88,2 44,1 22,05 11,025 SLIMbus Audio Bridge User Manual V0,9 - Draft Version!
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Page 28: Annex B - Presence Rate Accuracy
Annex B - Presence Rate Accuracy These tables only apply when input or output clocks are derived from the PLLs. SLIMbus Audio Bridge User Manual V0,9 - Draft Version!
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