Biostar B350GT3 Bios User Manual page 9

B350GT3 & X370GT3
Zen Common Options
RedirectForReturnDis
This item from a workaround for GCC/C000005 issue for XV Core on CZ A0, setting
MSRC001_1029 Decode Configuration (DE_CFG) bit 14 [DecfgNoRdrctForReturns] to 1.
Options: Auto (Default) / 1 / 0
L2 TLB Associativity
This item 0 - L2 TLB ways [11:8] are fully associative. 1 - L2 TLB ways [11:8] are 4K-only.
Options: Auto (Default) / 1 / 0
Platform First Error Handling
This item enabled or disabled PFEH, cloak individual banks, and mask deferred error interrupts
from each bank.
Options: Auto (Default) / Enabled / Disabled
Core Performance Boost
This item allows you to set the Core Performance Boost function.
Options: Auto (Default) / Disabled
Downcore control
This item allows you to set the number of Cores to be used.
Options: Auto (Default) / TWO (1 + 1) / TWO (2 + 0) / THREE (3 + 0) / FOUR (2 + 2) / FOUR (4 + 0)
/ SIX (3 + 3)
Enable IBS
This item allows you to set the Enable IBS.
Options: Auto (Default) / Enabled / Disabled
Global C-state Control
This item allows you to controls IO based C-state generation and DF C-states.
Options: Auto (Default) / Enabled / Disabled
Instruction Branch Prediction
This item allows you to control the Instruction Branch Prediction feature.
Options: Auto (Default) / Enabled / Disabled
2. Advanced Menu | 9