CML EV9790 User Manual

Evaluation kit for cmx979

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CML Microcircuits
COMMUNICA TION SEMICONDUCTORS
UM9790/1 July 2017
Features
Demonstrates the CMX979 Fractional-N RF PLL, IF PLL and
associated VCOs
On-board reference oscillator with options for an external
source
1

Brief Description

The EV9790 is a demonstration and evaluation platform for the CMX979 Dual PLL and VCOs. The CMX979 provides a 2700
to 3600 MHz 24-bit Fractional-N RF PLL with an internal RF VCO. A separate integer-N IF PLL and VCO covering 500 to
1000 MHz (as supplied) are also provided. An inductor value change can configure the IF VCO to cover other frequency
ranges. Both VCO outputs can be routed via selectable on- chip frequency dividers.
The board includes all necessary voltage regulators and is operated from an external ~6V dc supply.
The EV9790 provides a 19.2MHz reference oscillator along with options for an additional frequency reference. The
EV9790 interfaces to the PE0003 Universal Interface Controller via a HB0003 Interface Board which provides conversion
of the logic levels to allow read and write access to the CMX979 registers. This interface is supplied with the EV9790. A
graphical user interface is available for operational set-up as well as handling control scripts.
 2017 CML Microsystems Plc
Evaluation Kit for CMX979
USER MANUAL
Divided LO outputs
Powered by external 6.0V power supply
(engineering samples)
Advance Information
EV9790

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Summary of Contents for CML EV9790

  • Page 1: Brief Description

    EV9790 interfaces to the PE0003 Universal Interface Controller via a HB0003 Interface Board which provides conversion of the logic levels to allow read and write access to the CMX979 registers. This interface is supplied with the EV9790. A graphical user interface is available for operational set-up as well as handling control scripts.
  • Page 2: Table Of Contents

    Table 8 RF PLL – Possible Errors ................................. 23 Table 9 IF PLL – Possible Errors ................................23 Figure ......................................Page Figure 1 CMX979 Block Diagram ................................4 Figure 2 EV9790 Block Diagram ................................4 Figure 3 HB0003 Interface Board ................................. 5  2017 CML Microsystems Plc UM9790/1...
  • Page 3: History

    Comp (112.5MHz) and /16 (56.25MHz) outputs............................22 It is recommended that you check for the latest product datasheet version from the Products page of the CML website: www.cmlmicro.com. This is Advance Information; changes and additions may be made to this document. Parameters marked TBD or left blank will be included in later issues of this document.
  • Page 4: Block Diagram

    Figure 1 CMX979 Block Diagram Ext Clk IN VCTCXO Modulation Loop filter U3 / U4 RF PLL CMX979 C-BUS IF PLL RF PLL OUT IF PLL OUT IF tank VREG VREG Figure 2 EV9790 Block Diagram  2017 CML Microsystems Plc UM9790/1...
  • Page 5: Preliminary Information

    200mA. On-board regulators provide the 3.3V and 1.8V supplies to the circuits used on the PCB. NOTE: Care should be exercised with the 6.0V supply as there is the option to power the EV9790 directly from the PE0003 +5V supply via J15, although the additional components for this (L7 and R41) are not fitted as standard. If these components are fitted, an external supply should not be connected to J7.
  • Page 6: Quick Start

    The user should also read the appropriate CMX979 datasheet before using the EV9790 board. NOTES: The default configuration of EV9790 uses the following configuration:  U4: 19.2MHz frequency reference without buffer.
  • Page 7: Operation

    Evaluation Kit for CMX979 (engineering samples) EV9790 Operation When power is applied to the EV9790, the CMX979 is in reset. Signal Lists CONNECTOR PINOUT Connector Connector Signal Signal Description Ref. Pin No. Name Type LOOUT Output from the RF PLL / dividers...
  • Page 8 To use an external clock applied to J7, un-buffered, link pins 5-6 & 3-4. To use an external clock applied to J7, buffered, link pins 4-6 & 7-8. Table 6 Jumpers Notes: Input Output Test Loop Test Point  2017 CML Microsystems Plc UM9790/1...
  • Page 9: Circuit Schematics And Board Layouts

    For clarity, the circuit schematic diagrams are available as separate high-resolution files, which can be downloaded from the CML website. The layout on each side of the PCB is shown in Figure 6 and Figure 7: Figure 6 PCB Layout: Top ...
  • Page 10: Figure 7 Pcb Layout: Bottom

    Evaluation Kit for CMX979 (engineering samples) EV9790 Figure 7 PCB Layout: Bottom  2017 CML Microsystems Plc UM9790/1...
  • Page 11: Detailed Description

    Hardware Description Full details of the silicon functionality are contained in the CMX979 datasheet. The EV9790 is assembled on a 65 x 69mm, 1.6mm thick 6-layer PCB (reference PCB596B), with the upper layer having a Rogers RO4003C ceramic substrate for low loss and consistent high frequency performance.
  • Page 12: Power Supplies

    The input to the PCB is nominally 6.0V (absolute limits: 5.5V to 8V) applied to J7. Reverse polarity protection is provided by D2. On-board regulators (U6, U8) are provided to generate the 3.3V and 1.8V supplies used on the EV9790.
  • Page 13: Adjustments And Controls

    Script/GUI Control To investigate the performance and features of the EV9790 in more detail, a Windows GUI can be used to control the CMX979 via a PE0003 controller – either by manual register accesses or by running scripts. The GUI is common to the EV9750 Evaluation Kit, so is referred to as ES9750, and can be found in ‘ES9750xx.zip’.
  • Page 14: The C-Bus Control Tab

    The lengths of the entered values are limited to 2 characters (1 byte) for read or write register addresses and 2 or 4 characters (1 or 2 bytes) for the register write data. The General Reset button writes 00H to the CMX979 device. Figure 10 C-BUS Control Tab  2017 CML Microsystems Plc UM9790/1...
  • Page 15: The C-Bus Control Extended Tabs (C-Bus Ctrl Ext. 1 / Ext. 2)

    Use the ‘Save Config…’ button to save the current table. The Description, Address, Type, Data and Select columns are saved in the specified file. Use the ‘Open Config…’ button to load a previously saved table.  2017 CML Microsystems Plc UM9790/1...
  • Page 16: The General Control Tab

    The returned calibration values can be read back, along with an indication of the calibration status flags. Figure 13 VCO Calibration Tab  2017 CML Microsystems Plc UM9790/1...
  • Page 17: The Rf Pll Tab

    This tab provides access to the IF PLL functions. This includes a calculator to determine the register values for a reference (MCLK), comparison and wanted VCO output frequency. There are also drop-down selections for the IF and RF output dividers. Figure 15 IF PLL Tab  2017 CML Microsystems Plc UM9790/1...
  • Page 18: The Script Handler Tab

    GUI, but executed on the ARM Microprocessor on the PE0003 The script language is documented separately in the “Script Language Reference” document, which can be downloaded with the PE0003 support package from the CML website at www.cmlmicro.com. The following are two demonstration scripts developed for the EV9790 Evaluation Kit: EV9790_RFPLL 3G2 19M2.pes...
  • Page 19: Figure 17 Trace Dialog Box

    ‘Read’ button to upload and display the C-BUS transaction data block starting at the address displayed in the Trace Start Address edit box. Use the ‘Save…’ button to save the trace data to a file.  2017 CML Microsystems Plc UM9790/1...
  • Page 20: Application Information

    Evaluation Kit for CMX979 (engineering samples) EV9790 Application Information See Section 5.1 for board setup details and Section 5.2 for operation of the EV9790. 7.4.1 Typical Performance Typical performance for the EV9790 is shown below. The phase noise profiles can be varied by a number of settings, notably the loop filter bandwidth, comparison frequency, charge pump current, reference noise, output divider setting, etc.
  • Page 21 The IF PLL has a typical phase noise profile as shown in the plots below, using the default L3 inductor value. The effect of the divider is demonstrated in Figure 22. Figure 21 Phase noise plot of 900MHz IF PLL, Icp= 400µA, F =1.2MHz Comp  2017 CML Microsystems Plc UM9790/1...
  • Page 22 Evaluation Kit for CMX979 (engineering samples) EV9790 Figure 22 Phase noise plot of 900MHz IF PLL, Icp= 400µA, F =1.2MHz, also showing the effects of selecting the /4 (225MHz), Comp /8 (112.5MHz) and /16 (56.25MHz) outputs.  2017 CML Microsystems Plc UM9790/1...
  • Page 23: Troubleshooting

    EV9790 Troubleshooting The EV9790 is a complex RF system. If incorrectly programmed or modified, results will be at variance from datasheet performance. Please study the CMX979 datasheet, along with the User Manuals, associated schematics and layout drawings for the EV9790 board when troubleshooting. This section provides suggestions to help users resolve application issues that may be encountered.
  • Page 24: Performance Specification

    +0.5 Current into or out of any other connector pin Maximum Input Level 8.1.2 Operating Limits Correct operation of the Evaluation Kit outside these limits is not implied. Notes Min. Max. Units Supply (V  2017 CML Microsystems Plc UM9790/1...
  • Page 25: Operating Characteristics

    – Microcontroller Interface For timings see CMX979 Datasheet Notes: PCB current consumption, not current consumption of the CML devices. Unmatched Using the default value of inductor L3 (8.2nH). Measured at J3 from a 50 Ω source. This is Advance Information; changes and additions may be made to this document. Parameters marked TBD or left blank will be included in later issues of this document.
  • Page 26: Www.cmlmicro.com

    EV9790 CML does not assume any responsibility for the use of any circuitry described. No IPR or circuit patent licences are implied. CML reserves the right at any time without notice to change the said circuitry and any part of this product specification. Evaluation kits and demonstration boards are supplied for the sole purpose of demonstrating the operation of CML products and are supplied without warranty.

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