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BVM PMCCTR32 User Manual

32-bit opto-isolated i/o counter/timer pmc module
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Manual P/N 854-11001
This material contains information of proprietary interest to BVM Ltd. It has been supplied in
confidence and the recipient, by accepting this material, agrees that the subject matter will not be
copied or reproduced, in whole or in part, nor its contents revealed in any manner or to any person
except to meet the purposes for which it was delivered.
User's Manual
PMCCTR32
32-bit Opto-Isolated I/O
Counter/Timer PMC Module
Board Revision B
Manual Revision A 06 April 2001
BVM Limited,
Hobb Lane,
Hedge End,
Southampton,
SO30 0GH, UK.
TEL: +44 (0)1489 780144
FAX: +44 (0)1489 783589
E-MAIL: sales@bvmltd.co.uk
WEB:
http://www.bvmltd.co.uk

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  • Page 1 Board Revision B Manual Revision A 06 April 2001 This material contains information of proprietary interest to BVM Ltd. It has been supplied in confidence and the recipient, by accepting this material, agrees that the subject matter will not be copied or reproduced, in whole or in part, nor its contents revealed in any manner or to any person except to meet the purposes for which it was delivered.
  • Page 2 This page is intentionally left blank.
  • Page 3 BVM Ltd. This applies to any merged, modified or derivative version USE OF PRODUCT...
  • Page 4 This page is intentionally left blank.
  • Page 5 Table Of Contents Contents Page 1. Introduction ............................1 1.1 Scope ............................1 1.2 PMCCTR32 Part Numbers......................1 1.3 PMC I/O Board Part Numbers....................1 2. Overview ............................2 2.1 Board Layout ..........................2 2.2 Features .............................3 2.3 Applications ..........................3 3. Operation ............................4 3.1 Block Diagram ..........................4 3.2 PCI9030 PCI Interface .......................4...
  • Page 6 7.2 Address Map ..........................13 7.3 Register Descriptions .......................14 7.3.1 Counter/Timer Output Register .................... 14 7.3.2 Counter/Timer Clock Register ....................14 7.3.3 Counter/Timer Gate Register ....................14 7.3.4 Counter/Timer Direction Register..................14 7.3.5 Counter/Timer Gate Override Register ................14 7.3.6 Counter/Timer Direction Override Register................14 7.3.7 Counter/Timer Status Register.....................
  • Page 7 List of Figures Figure Page Figure 1 Board Layout Topside ....................... 2 Figure 2 Board Layout Underside ......................2 Figure 3 Block Diagram........................... 4 Figure 4 Output Circuit ..........................7 Figure 5 Input Circuit ..........................8 Figure 6 Connector Pin-outs for 9-pin D-type..................11...
  • Page 8 This page is intentionally left blank.

  • Page 9: Introduction

    This User's Manual is intended for use by system integrators, service personnel, software engineers and end users. This User's Manual covers details of the PMCCTR32 only, which is one in a range of PMCDIO digital I/O and PMCCTR counter/timer I/O PMC modules from BVM.

  • Page 10: Overview

    PMCCTR32 Overview Board Layout Figure 1 Board Layout Topside Figure 2 Board Layout Underside Copyright  2001 BVM Ltd.

  • Page 11: Features

    • Conforms to PMC standard IEEE P1386.1/Draft 2.3 9 October 2000. • Conforms to PCI Local Bus Specification Revision 2.2. Applications • Interfacing to industrial equipment. • Industrial control timing & counting. • Fail-safe timer/counter. Copyright  2001 BVM Ltd.

  • Page 12: Operation

    Two programmable Local-to-PCI interrupts. • Endian Byte Swapping. Note that not all of these features are pertinent to the PMCCTR32 - see section "A.1 PCI9030 PCI Interface (on page 19)" for further details of the device. Copyright  2001 BVM Ltd.

  • Page 13: Main Logic

    PMCCTR32 Main Logic The PMCCTR32 uses a Xilinx SpartanXL FPGA connected to the 16-bit local bus to provide the on- board logic functions as described below. 3.3.1 Counter/Timer Output Register An 8-bit Counter/Timer Output Register containing the levels of the Counter/Timer Output pins on the logic device.

  • Page 14: Control & Status Register

    Direction Override Register or Gate Override Register respectively. If the count crosses the 0000/FFFF boundary (rollover) the OUTPUT is activated. The maximum time from CLOCK to OUTPUT is 600nS. The system is then prepared for the next clock edge. Copyright  2001 BVM Ltd.

  • Page 15: I/O Interface

    Note that Figure 4 above shows the output load on the low-voltage side. As the output signals are voltage-free, the output load may alternatively be connected on the high-voltage side. Copyright  2001 BVM Ltd.

  • Page 16: Input Circuit

    93CS56 EEPROM The PMCCTR32 is fitted with a 93CS56 EEPROM which is supplied pre-programmed by BVM. The contents of this EEPROM are read by the PCI9030 on coming out of reset and are used to set up the control registers after reset, configuring the PCI interface configuration, PCI Device/Vendor ID's &...

  • Page 17: Installation

    (two on the front panel and two on the spacers). 4. There is no voltage keying on the PMCCTR32, it will work in both +3.3V and +5V host carriers. 5. The PMCCTR32 can be used with a BVM supplied connecting lead to standard 9-pin D-type connectors, or a user supplied alternative.

  • Page 18: Connections

    P8-7 CTDIR5- CTCLK6+ P4-3 P8-3 CTDIR6+ CTCLK6- P4-8 P8-8 CTDIR6- CTCLK7+ P4-4 P8-4 CTDIR7+ CTCLK7- P4-9 P8-9 CTDIR7- Note: CTOUT = Counter/Timer Output CTCLK = Counter/Timer Clock CTGTE = Counter/Timer Gate CTDIR = Counter/Timer Direction Copyright  2001 BVM Ltd.

  • Page 19: Rear I/O Connector

    PMC I/O Board If required, a SCSI-III style lead can be used to connect to the BVM 8 Port PMC I/O Board from either the Front Panel Connector or the Rear I/O Connector providing 8 off 9 pin D-type connectors - see section "1.3 PMC I/O Board Part Numbers (on page 1)"...

  • Page 20: Pci Connections

    AD[12] AD[11] Ground AD[10] AD[09] AD[08] +3.3V Ground C/BE[0]# AD[07] PMC-RSVD AD[06] AD[05] +3.3V PMC-RSVD AD[04] Ground PMC-RSVD Ground V (I/O) AD[03] PMC-RSVD PMC-RSVD AD[02] AD[01] Ground PMC-RSVD AD[00] ACK64# +3.3V Ground REQ64# Ground PMC-RSVD Copyright  2001 BVM Ltd.

  • Page 21: Programming

    A pre-programmed EEPROM contains the BVM PCI Vendor ID, which is 15C0 (hexadecimal) and the PCI Device ID, which is 02FF (hexadecimal) and the BVM PCI Subsystem Vendor ID, which is 15C0 (hexadecimal) and the PCI Subsystem Device ID, which is 020C (hexadecimal).

  • Page 22: Register Descriptions

    The interrupt may be cleared by writing a 1 to the relevant bit in the Counter/Timer Interrupt Enable Register or by clearing the output - see section"7.3.7 Counter/Timer Status Register (above)". Copyright  2001 BVM Ltd.

  • Page 23: Counter/Timer Clock Source Register

    7.3.13.4 Watchdog Status (Bit 7: WDGST) When set to 1 this bit indicates an enabled internal watchdog has timed-out - see section "7.3.13.3 Internal Watchdog Enable (Bit 6: IWDEN) (above)". Once set this bit cannot be cleared. Copyright  2001 BVM Ltd.

  • Page 24: Internal Counter/Timer Clock/De-Bounce (Bit 10..8: Inclk2..0)

    Note that once the internal watchdog is running, this register is read only - writing to the register will cause the watchdog to trigger. Bits Watchdog Refresh Period 2 - 0 125ms 250ms 500ms 1.0sec 2.0sec 2.0sec 2.0sec 2.0sec Copyright  2001 BVM Ltd.

  • Page 25: Watchdog Status Register

    BVM can supply a disc containing the driver files and example source code for Windows 98, NT4.0 and 2000 along with BVM installation files. The BVM installation files will ensure that the correct driver configuration is selected upon installation. Copyright  2001 BVM Ltd.

  • Page 26: Specification

    250mA output current limit Short-circuit protection Counter/Timer Functions 8 x 16-bit Counter/Timers External or Internal Clock Input Internal Clock Frequency Select External Gate Input External Direction Input External Output on Count Rollover Interrupt on Count Rollover Copyright  2001 BVM Ltd.

  • Page 27: Pmc Interface

    Vishay Telefunken K817P/ K827PH/ K847PH Optocoupler with Phototransistor Output, Data Sheet: Rev. A2, 11–Jan–99. (http://www.vishay.com) PMC Specification IEEE Draft Standard Physical and Environmental Layers for PCI Mezzanine Cards: PMC P1386.1/Draft 2.3 9 October 2000. (http://www.ieee.org) Copyright  2001 BVM Ltd.

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