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Table of contents Overview ..................3 eC-test-mate types ..............4 eC-test-mate Type I (TCC 211) ..........5 Functional description ................. 5 Analog Inputs (101..104) ................5 Analog Outputs (101..104) ................7 Digital Inputs (101..104) ................8 Digital Outputs (Group 101 and 102) ............9 Bi-Directional Digital I/O ................
Each Test Probe type has a unique footprint so that it is impossible to connect a Test Probes to the wrong test points. An eC-test-mate Docking Station is available as well. The main advantage of plugging a Test Probe into the Docking Station is that the power that can be delivered by the Test Probe's power supply is increased. The USB standard limits the output current to 500mA which results in a maximum output power of 2.5W.
If the Unit Under Test (UUT) requires more test points then there are available on one or when the mix of required test functions is not available from a specific eC-test-mate type, then it is possible to combine multiple eC-test-mates.
A block diagram of the eC-test-mate Type I is shown in the figure below: The eC-test-mate Type I board is connected to a PC via USB. Via this connection, information about outputs to be set and values of inputs are exchanged about five times per second.
Note: the internal 100R resistor can only dissipate 100mW. E.g. when the output is programmed for 5V and 24V is applied on the corresponding EC-test-mate pin, then there will be a voltage of 18.5V across the 100R resistor which would result in 3.4W dissipation! Note: besides the maximum current, there is also a limit on dissipated power by the outputs.
• MAP Bi-Directional Digital I/O With the eC-test-mate Type I, it is possible to test up to 4 bi-directional digital signals. As described in previous two sections, the 4 output bits of Group 102 are located on the same connector locations as digital inputs 101..104.
Note 1: the naming of the connector pins is as seen from the eC-test-mate. SERIAL_TX is therefore an output on which the data towards the UUT is provided by the EC-test-mate and SERIAL_RX is an input on which data from the UUT is received.
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STX, ETX and DLE in the packet data. Thus, when receiving DLE, then this byte shall not be added to the packet but the next received byte shall be added without interpreting the received value as STX, ETX or DLE. Values used by the eC-test-mate Type I: STX = 0x0F (15 ETX = 0x04 (4...
The two figures at the end of this section show the available output current and power for a number of output voltages. Note: trying to draw more power from a standard USB port than it can provide will result in the eC-test-mate to temporarily disconnect (due to a reset of the USB circuitry).
BOARD_DETECT. Note: it is mandatory that the Board Detect pin of every eC-test-mate that is used in a test is connected to GND on the UUT when using the TEST-TRACK or eC-my-test software, since a test cannot be started when no board under test is detected.
RS485, I2C and UART. Functional Description This section describes all the functional blocks of the eC-test-mate Type II which is specialized for testing UUTs with communication interfaces. Besides the electrical specification of the interface pins on the connectors of the eC-test-mate Type II there are also references to the TEST-OK Description Language (TDL) commands that can be used to control the functional blocks.
'1' level of the serial interface. If left open, the UART_TX output will NOT work. Note 2: The internal eC-test-mate UART is shared between the UART test pins and the RS485 test pins. Depending on the last configuration command, either the UART pins or RS485 pins will be active.
Driver output current: -60..+60 mA Note 1: The internal eC-test-mate UART is shared between the UART test pins and the RS485 test pins. Depending on the last configuration command, either the UART pins or RS485 pins will be active. If the RS485 interface is inactive, the eC-test-mate's RS485 driver will be in the high-impedance state.
Transient Voltage diodes protect the outputs against voltages above 5V if such a voltage is inadvertently applied to the test pins. Applying more than 8V for longer periods to these test pins may damage the eC-test-mate. Currently, the SCL clock frequency is fixed at 100kHz Associated test command(s): •...
This section describes all the functional blocks of the eC-test-mate Type III. Besides the electrical specification of the interface pins on the connectors of the eC-test-mate Type III there are also references to the TEST-OK Description Language (TDL) commands that can be used to control the functional blocks.
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