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TIP850-10 16 channel 12 bit ADC (gain 1, 10, 100), 4 channel 12 bit DAC TIP850-11 16 channel 12 bit ADC (gain 1, 2, 4, 8), 4 channel 12 bit DAC This manual covers both products This document contains information, which is proprietary to TEWS DATEN TECHNIK GmbH. Any reproduction without written permission is forbidden.
The four D/A channels provide simultaneous loading and output voltages of ±10 V. After RESET all D/A channels default to 0 V. Each TIP850 is calibrated at the factory. Calibration information for both, A/D and D/A circuits are stored in the Identification PROM unique to each IP.
16 single ended channels or 8 differential channels Input Gain Amplifier programmable for gain 1, 10, 100 (TIP850-10 only) programmable for gain 1, 2, 4, 8 (TIP850-11 only) Input Voltage Range for TIP850-10: ±10V (gain = 1) ±1V (gain = 10) ±0.1V (gain = 100)
(single ended or differential) is selected by programming the input multiplexer. A software programmable gain amplifier with gain settings of 1, 10 and 100 for the TIP850-10 and 1, 2, 4 and 8 for the TIP850-11 allows a direct connection of a wide rage of sensors and instrumentation. The maximum analog input voltage range is ±10V at a gain of 1.
3.3. Data Correction There are two errors which affect the DC accuracy of the ADC and DAC. The first is the zero error (offset). For the ADC this is the data value when converting with the input connected with its own ground in single ended mode, or with shorted inputs in differential mode.
3.3.2. DAC Correction formula The basic formula for correcting any DAC output is: 'DWD 9DOXH
*DLQ 2IIVHW FRUU FRUU Data is the number that will be sent to the DAC, Value is the desired output value, Gain and Offset corr corr...
5. IP Addressing The TIP850 is controlled by a set of registers, which are directly accessible in the IO address space of the IP. ADDRESS NAME FUNCTION SIZE $ 00 ADCCSR ADC Control and Status Register word $ 02 ADCCON...
,Q GLIIHUHQWLDO PRGH RQO\ FKDQQHOV WR PD\ EH VHOHFWHG ,Q WKLV PRGH FKDQQHOV WR DUH XVHG DV LQSXW IRU FKDQQHOV WR 5.1.1.2. ADC Gain Selection Bit 5 and bit 6 of the ADCCSR are used to program the gain of the input amplifier. These bits are write only. *$,1 *$,1 *DLQ 6HOHFWLRQ...
,QWHUUXSW (QDEOH Figure 8: ADCCSR Interrupt Enable 5.1.1.5. ADC Status The status of the ADC converter can be obtained by ready the bit 14 and bit 15 of the ADCCSR. As long as bit 14 is in the ’1’ state, the settling time did not expire after writing to the ADCCSR. Bit 15 indicates the busy status of the ADC converter itself.
+RZHYHU WKLV YROWDJH LV QRW FRUUHFWHG IRU WKH RIIVHW HUURU 5.2.3. Interrupt Vector Register The Interrupt Vector Register INTVEC is a byte wide read/write register. It must be loaded with the desired inter- rupt vector value, when interrupts shall be used with the TIP850. 7,3 8VHU 0DQXDO 9HUVLRQ ...
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