JHCTech EPI-I981 User Manual page 43

Epic,4” industrial motherboard; socket g2, 3rd and 2nd generation intel core i3/i5/i7 processors
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Active LFP
Panel Color Depth
►DMI Configuration
►NB PCIe Configuration
PEG0
PEG0 – Gen X
PEG0 – ASPM
Enable PEG
Detect Non-Compliance Device [Disabled]
De-emphasis Control
PEG Sampler Calibrate
Swing Control
Gen3 Equalization
Gen3 Eq Phase 2
PEG Gen3 Root Port Preset Value for each Lane
PEG Gen3 Endpoint Preset Value for each Lane
PEG Gen3 Endpoint Hint Value for each Lane
Gen3 Eq Preset Search
PEG Link Disabled
Fast PEG Init
RxCEM Loop back
PCIe Gen3 RxCTLEp Setting
►Memory Configuration
[Level 10 ]
[Level 11 ]
[Level 12 ]
[Level 13]
[Level 14 ]
[Level 15]
[Int-LVDS]
[No LVDS]
[SDVO LVDS]
[eDP Port-A]
[eDP Port-D]
[24 Bit]
[18 Bit]
[Not Present]
[Auto]
[Gen1]
[Gen2]
[Gen3]
[Auto]
[Disabled]
[ASPM Los]
[ASPM L1]
[ASPM LosL1]
[Auto]
[-3.5 dB]
[-6 dB]
[Auto]
[Full]
[Enabled]
[Auto]
[Disabled]
[Disabled]
[Enabled]
[Disabled]
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