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Table of Contents
Summary of Contents for Microsemi UG0651
- Page 1 UG0651 User Guide Scaler...
- Page 2 Within the USA: +1 (800) 713-4113 with the Buyer. Microsemi does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other IP rights, whether with regard to such information itself or anything described by such information. Information provided in this...
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Page 3: Table Of Contents
Resource Utilization ..............12 UG0651 User Guide Revision 4.0... - Page 4 ModelSim Tool with Scaler Testbench File ......... . . 12 UG0651 User Guide Revision 4.0...
- Page 5 Resource Utilization Report ............12 UG0651 User Guide Revision 4.0...
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Page 6: Revision History
• Table 1, page 4 and Table 4, page 12 were updated. • Figure 2, page 4 and Figure 4, page 7 were updated. Revision 1.0 Revision 1.0 was the first publication of this document. UG0651 User Guide Revision 4.0... -
Page 7: Introduction
(horizontally and vertically) based on the values of neighboring pixels. The nearest neighbor algorithm is used to find the empty spaces in the original image, and to replace them with the nearest neighboring pixel. UG0651 User Guide Revision 4.0... -
Page 8: Figure 1 Scale-Up From 2X2 To 4X4
Introduction Figure 1 • Scale-Up from 2x2 to 4x4 UG0651 User Guide Revision 4.0... -
Page 9: Hardware Implementation
NxtLine_PixelNum_Offset_o is the first pixel of the next line in sequence. The following equations are used to calculate scaling factors for horizontal and vertical resolutions: g scaling bitwidth --------- scale factor g scaling bitwidth --------- scale factor UG0651 User Guide Revision 4.0... -
Page 10: Inputs And Outputs
[g_DATA_BITWIDTH * g_CHANNELS - 1 : 0] Input data to scaler. DATAIn_VLD_i Input – Set when input data is valid. Start_i Input – Scaler start signal. To be set to high before loading a new frame. UG0651 User Guide Revision 4.0... -
Page 11: Configuration Parameters
Output resolution X bit width g_OUTPUT_Y_RES_BITWIDTH Output resolution Y bit width g_SCALE_FACTOR_BITWIDTH Scaling factor bit width g_SF_ROUNDING_PRECISION Scaling factor's rounding precision bit width. Default value is configured to 256 (2 g_BUFF_DEPTH Line buffer depth UG0651 User Guide Revision 4.0... -
Page 12: Fsm Implementation
FSM moves to RAM_FULL_CHECK state. After the total frame data is output, the FSM moves to IDLE state. The following figure shows the scaler FSM implementation. Figure 3 • Scaler FSM States UG0651 User Guide Revision 4.0... -
Page 13: Timing Diagram
Testbench Configuration Parameters Name Description CLKPERIOD Clock period IN_HEIGHT Height of the input image IN_WIDTH Width of the input image OUT_HEIGHT Height of the output frame OUT_WIDTH Width of the output frame IMAGE_FILE_NAME Input file name UG0651 User Guide Revision 4.0... -
Page 14: Figure 5 Create Smartdesign Testbench
Enter a name for the SmartDesign testbench in the dialog box, and click OK. Figure 6 • Create New SmartDesign Testbench Dialog Box A SmartDesign testbench is created, and a canvas appears to the right of the Design Flow pane. UG0651 User Guide Revision 4.0... -
Page 15: Figure 7 Scaler
Scaler Core on SmartDesign Testbench Canvas Select all the ports of the core, right-click, and then click Promote to Top Level, as shown in the following figure. Figure 9 • Promote to Top Level Option UG0651 User Guide Revision 4.0... -
Page 16: Figure 10 Scaler Ports Promoted To Top Level
From the SmartDesign toolbar, click the Generate Component highlighted in the following figure. Figure 11 • Generate Component In the Files window, right-click the simulation directory, and click Import files..., as shown in the following figure. Figure 12 • Import Files Option UG0651 User Guide Revision 4.0... -
Page 17: Figure 13 Input File Selection
The imported file is listed under simulation as shown in the following figure. Figure 14 • Input File in Simulation Directory In the Stimulus Hierarchy, expand Work, and right-click Scaler_test (Scaler_tb.v). Select Simulate Pre-Synth Design, then click Open Interactively. Figure 15 • Simulating Pre-Synthesis Design UG0651 User Guide Revision 4.0... -
Page 18: Resource Utilization
The scaler is implemented in the SmartFusion 2 system-on-chip (SoC) FPGA (M2S150T-1FC1152 package). The following table lists the resources used by the FPGA. Table 4 • Resource Utilization Report Resource Usage DFFs 4-Input LUTs MACC RAM1Kx18 RAM64x18 UG0651 User Guide Revision 4.0...
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