Summary of Contents for SpinCore Technologies DDS-I-300
- Page 1 PulseBlasterDDS™ Model DDS-I-300 (USB Board Version SP7) Owner’s Manual SpinCore Technologies, Inc. http://www.spincore.com...
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Page 2: Pulseblasterdds-I
SpinCore Technologies, Inc. makes every effort to verify the correct operation of the equipment. This equipment version is not intended for use in a system in which the failure of a SpinCore device will threaten the safety of equipment or person(s). -
Page 3: Table Of Contents
PulseBlasterDDS-I-300 Table of Contents Table of Contents ........................... 3 I. Introduction ............................4 Product Overview ............................... 4 Board Architecture ..............................4 Block Diagram ............................... 4 Product Specifications ..............................6 RF Output Level ................................7 II. Installation ............................8 Installing the PulseBlasterDDS-I-300 ......................... 8 Testing the PulseBlasterDDS-I-300 .......................... -
Page 4: Introduction
PulseBlasterDDS-I-300 I. Introduction Product Overview PulseBlasterDDS is a high-performance signal generator that combines two units – the digital waveform synthesis unit (DDS, Direct Digital Synthesis), and the PulseBlaster Timing Processor. The PulseBlaster Timing Processor provides all the necessary timing control signals required for overall system control and pulse synchronization. - Page 5 PulseBlasterDDS-I-300 The PB Core controls the timing of the gating pulses and provides the necessary control signals for frequency, phase, shape and amplitude registers. The PB Core also outputs TTL signals to the outside world, as programmed by the user. The PB processor core executes instructions as written by the user and stored in the on-chip SRAM module, and, once programmed, the processor operates autonomously.
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Page 6: Product Specifications
PulseBlasterDDS-I-300 Product Specifications Parameter Units Analog Output D/A sampling rate D/A sampling precision bits Output voltage range (peak-peak) 1 - 4 Phase resolution deg. 0.09 Frequency resolution 1.11 RF Output DC (0 Hz) Digital Output Number of digital outputs Logical 1 output voltage Logical 0 output voltage Output drive current Rise/Fall time... -
Page 7: Rf Output Level
PulseBlasterDDS-I-300 RF Output Level There are currently two different options for PulseBlasterDDS-I-300 RF analog output amplifier – the standard gain and the high gain. Figure 2, below shows the typical frequency characteristics of the analog output signals for the two output options. -
Page 8: Ii. Installation
SpinAPI is a custom Application Programming Interface (API) package developed by SpinCore Technologies, • Inc. SpinAPI is designed to be used only with SpinCore Technologies, Inc. products. SpinAPI can be utilized using C/C++, or LabVIEW (described in Section VII). SpinAPI contains device drivers and example programs. A shortcut to the location of these files is created •... -
Page 9: Testing The Pulseblasterdds-I-300
PulseBlasterDDS-I-300 Testing the PulseBlasterDDS-I-300 Once your board is installed properly, the functionality of the device can be tested using three example programs available from the SpinCore website. All output sequences generated by test programs can be verified using an oscilloscope. If you are using a high input impedance oscilloscope to monitor the PulseBlasterDDS-I-300's output, place a resistor that matches the characteristic impedance of the transmission line in parallel with the coaxial transmission line at the oscilloscope input by attaching it to the line through a T-Adapter(e.g., a 50 Ω... - Page 10 PulseBlasterDDS-I-300 Figure 4: BNC T-Adapter on oscilloscope with coaxial transmission line connected on the left and BNC 50 Ohm resistor connected on the right, to terminate the line. The first program is pbdds_i_300_excite_test. This will produce a 1.0 MHz sine wave on the Analog Out connection and a logical high signal on the Digital Out connection - these signals will turn on for 10 μs and off for 1 ms and will be repeated indefinitely.
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Page 11: Using The Pulseblasterdds-I-300
PulseBlasterDDS-I-300 III. Using the PulseBlasterDDS-I-300 Controlling the PulseBlasterDDS-I-300 with SpinAPI This section describes the function and use of each feature of the PulseBlasterDDS-I-300. The PulseBlasterDDS-I-300 is a highly versatile excitation board, and as a result there are many possible approaches to program the board. -
Page 12: Sample Output
PulseBlasterDDS-I-300 Register Bank Number of registers Frequency Phase Table 2: Frequency Register information. Relevant SpinAPI functions: pb_start_programming() pb_set_phase() pb_set_freq() pb_stop_programming() Sample Output Figure 5, below, shows an example RF 70 MHz output pulse that was generated by the board. The data was captured using a Tektronix TDS224 oscilloscope. - Page 13 PulseBlasterDDS-I-300 Figure 6, below, demonstrates the zero-latency phase-switching agility. In this figure, two short back-to-back pulses were recorded with a 180-degree phase offset and a 70 MHz carrier frequency (expanded view). Figure 6: Two RF output pulses, back to back, with a 180 degree phase switch and 70 MHz RF frequency.
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Page 14: Shape And Amplitude Registers (Awg)
PulseBlasterDDS-I-300 Shape and Amplitude Registers (AWG) The AWG (Arbitrary Waveform Generator) system can be programmed with a wide variety of parameters. The main features of this system are: RF outputs can be shaped by an arbitrary waveform. (for example, a sinc waveform). •... - Page 15 PulseBlasterDDS-I-300 Figure 8: Sinc-shaped soft pulse. Pulse duration of 0.5 ms. Figure 9: Combination of soft RF pulses with variable amplitudes. http://www.spincore.com 2017-11-14...
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Page 16: Pulse Programs
PulseBlasterDDS-I-300 Figure 10: Combination of soft and hard RF pulses in sequence. Pulse Programs The PulseBlasterDDS-I-300 contains an integrated PulseBlaster pulse generation timing core. This timing core controls all aspects of the systems functionality by setting internal control lines at user specified times. Nine user programmable digital outputs are also available for control of external hardware. -
Page 17: Control Lines
PulseBlasterDDS-I-300 Specify end of a loop. Execution END_LOOP Address of beginning of loop returns to begging of loop and decrements loop counter. Address of first subroutine Program execution jumps to instruction beginning of a subroutine Program execution returns to Unused instruction after JSR was called Program execution continues at specified instruction. -
Page 18: Triggering
PulseBlasterDDS-I-300 Triggering The PulseBlasterDDS-I-300 can be triggered in two ways, either by software trigger or hardware trigger. The software trigger is initiated by sending a command from the host PC. Because these boards are typically used with non real-time operating systems, the exact time between issuing a software trigger and the board acting on that trigger cannot be precisely specified. -
Page 19: Clock Input Signal Standard
PulseBlasterDDS-I-300 Clock Input Signal Standard The PulseBlasterDDS-I-300 is a digital system built in CMOS technology and powered off a 3.3 V DC source. It will accept external clock signals that conform to the low-voltage 3.3 V TTL standard only. Negative voltage below 0.2 Volts would damage the processor chip, and thus any external sinusoidal signal would need to be converted to the positive-only TTL signal prior to using with the PulseBlasterDDS-I-300. -
Page 20: Pci Connection - Connecting To The Pulseblasterdds-I-300-Pci Boards
PulseBlasterDDS-I-300 IV. PCI Connection - Connecting to the PulseBlasterDDS-I-300-PCI boards Connector Information There are two main connector types on the PulseBlasterDDS-I-300 PCI board: the BNC connectors and the IDC headers – see Figure 11 below. BNC connectors are mounted on the PCI bracket and are available outside of the computer. -
Page 21: Hwtrig/Reset Header
PulseBlasterDDS-I-300 Each pin on an IDC header corresponds to a bit in the flag field of an instruction. The association between bits and pins is shown in the table below (Table 5, next page). In the PBDDS-I-300 design, the flag bits that are used to select frequency and phase registers are also routed to the IDC connectors so external hardware can be used to determine the state of the program. -
Page 22: Usb Connection - Connecting To The Pulseblasterdds-I-300-Usb Boards
PulseBlasterDDS-I-300 V. USB Connection - Connecting to the PulseBlasterDDS-I-300-USB boards Power Requirements 1. Recommended values and maximum currents: +5V, 2.0 A (Digital Section) • +6 V, 1.0 A (Analog Section, Positive Voltage) • -6 V, 0.2 A (Analog Section, Negative Voltage) •... -
Page 23: Digital Output Connectors
Warning: Do not connect PEG (PCI Express Graphics) power connectors available in some computers directly to the 6-position Molex-style power connector. Doing so will cause irreparable damage to the board. SpinCore Technologies is not liable for any damage caused by this. - Page 24 PulseBlasterDDS-I-300 Table 6: DB-9 Output Connector J300 signal list. Figure 17: Shrouded IDC Output Header J301. Pin number Function Ground Flag bit 0 Ground Flag bit 1 Ground Flag bit 3 Ground Flag bit 2 Ground Reserved Table 7: Shrouded IDC Output Header J301 signal list. http://www.spincore.com 2017-11-14...
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Page 25: Header Jp302
PulseBlasterDDS-I-300 Header JP302 The unshrouded male header labeled JP302 contains the Hardware Trigger and Hardware Reset lines. This header, see Figure 18 and Table 8, on the next page, for the layout and pin assignments, also offers a 10 MHz output that is derived from the master clock oscillator. -
Page 26: Connector Locations
PulseBlasterDDS-I-300 Connector Locations Figure 19: USB Board Connector Locations. VI. External Frequency Modulation There exists a custom firmware design(EEPROM Code 12-12) which allows the user to select between frequency registers using dedicated hardware control lines to perform FSK modulation. The use of these frequency control lines to select between frequency registers is described below. -
Page 27: Important Notes
PulseBlasterDDS-I-300 Pin number Function Ground Frequency Select 0 Ground Frequency Select 1 Ground Frequency Select 2 Ground Hardware Trigger Ground Hardware Reset Table 9: Output Header JP302 signal list. Designs with external frequency modulation control have three hardware frequency select input pins located as shown in Table 9 above. -
Page 28: Vii. Pulseblasterdds-I-300 Interface For Labview
PulseBlasterDDS-I-300 VII. PulseBlasterDDS-I-300 Interface for LabVIEW Overview of SpinCore LabVIEW GUI Interface SpinCore has developed an easy-to-use LabVIEW Graphical User Interface (GUI) that allows the user to program and control PulseBlasterDDS-I-300 boards. Simply set the parameters as described in this manual and run the program to control the digital pulse and RF generation of the board. -
Page 29: Related Products And Accessories
3. If you require a specific number of amplitude registers, memory words, alternative clock frequencies, or an Oven Controlled Crystal Oscillator (OCXO), please inquire with SpinCore Technologies through our contact form, which is available at http://www.spincore.com/contact.shtml 4. Power Supply for PulseBlasterDDS-I-300-USB boards. For more information, please visit: http://www.spincore.com/products/SP11/RadioProcessor-USB-Power-Supply.shtml...
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