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Dallas DS80C390 Manual

Dual can high-speed microprocessor
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GENERAL DESCRIPTION

The
DS80C390
is
microprocessor with dual CAN 2.0B controllers. The
redesigned
processor
instructions up to 3X faster than the original for the
same crystal speed. The DS80C390 supports a
maximum crystal speed of 40MHz, resulting in
apparent
execution
(approximately 2.5X). An optional internal frequency
multiplier allows the microprocessor to operate at full
speed with a reduced crystal frequency, reducing
EMI. A hardware math accelerator further increases
the speed of 32-bit and 16-bit multiply and divide
operations as well as high-speed shift, normalization,
and accumulate functions.
The High-Speed Microcontroller User's Guide and High-Speed
Microcontroller User's Guide: DS80C390 Supplement must be
used in conjunction with this data sheet. Download both at:
www.maxim-ic.com/microcontrollers.
APPLICATIONS
Industrial Controls
Factory Automation
Medical Equipment
Automotive

PIN CONFIGURATIONS

9
TOP VIEW
10
Dallas Semiconductor
26
27
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
Dual CAN High-Speed Microprocessor
a
fast
8051-compatible
core
executes
8051
speeds
of
100MHz
Agricultural Equipment
Gaming Equipment
Heating, Ventilation, and
Air Conditioning
1
61
DS80C390
43
PLCC
1 of 54
FEATURES
§
80C52 Compatible
§
High-Speed Architecture
§
4kB Internal SRAM Usable as Program/
Data/Stack Memory
§
Enhanced Memory Architecture
§
Two Full-Function CAN 2.0B Controllers
§
Two Full-Duplex Hardware Serial Ports
§
Programmable IrDA Clock
§
High Integration Controller
§
16 Interrupt Sources with Six External
§
Available in 64-Pin LQFP, 68-Pin PLCC
See page 29 for a complete list of features.

ORDERING INFORMATION

PART
DS80C390-QCR
DS80C390-QNR
DS80C390-FCR
DS80C390-FNR
60
49
44
64
DS80C390
MAX
CLOCK
TEMP RANGE
SPEED
(MHz)
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
48
Dallas Semiconductor
DS80C390
1
LQFP
REV: 022305
PIN-
PACKAGE
40
68 PLCC
40
68 PLCC
40
64 LQFP
40
64 LQFP
33
32
17
16

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Summary of Contents for Dallas DS80C390

  • Page 1: General Description

    8051 § 4kB Internal SRAM Usable as Program/ instructions up to 3X faster than the original for the Data/Stack Memory same crystal speed. The DS80C390 supports a § Enhanced Memory Architecture maximum crystal speed of 40MHz, resulting in apparent execution...

  • Page 2: Absolute Maximum Ratings

    DS80C390 Dual CAN High-Speed Microprocessor ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………………………………………….-0.3V to (V + 0.5V) Voltage Range on V Relative to Ground……………………………………………………………………-0.3V to +6.0V Operating Temperature Range………………………………………………………………………………..-40°C to +85°C Storage Temperature Range………………………………………………………………………………...-55°C to +125°C Soldering Temperature…..……………………………………………………………………..See IPC/JEDEC J-STD-020 Stresses beyond those listed under “Absolute Maximum Ratings”...
  • Page 3 DS80C390 Dual CAN High-Speed Microprocessor AC ELECTRICAL CHARACTERISTICS—(MULTIPLEXED ADDRESS/DATA BUS) (Note 10, Note 11) 40MHz VARIABLE CLOCK PARAMETER SYMBOL CONDITIONS UNITS External oscillator Oscillator Frequency 1 / t CLCL External crystal 0.375 t ALE Pulse Width LHLL Port 0 Instruction Address or CE0–4 0.125 t...
  • Page 4 DS80C390 Dual CAN High-Speed Microprocessor AC SYMBOLS The DS80C390 uses timing parameters and symbols similar to the original 8051 family. The following list of timing symbols is provided as an aid to understanding the timing diagrams. SYMBOL FUNCTION Time Address...
  • Page 5 DS80C390 Dual CAN High-Speed Microprocessor MOVX CHARACTERISTICS (MULTIPLEXED ADDRESS/DATA BUS) (Note 12) STRETCH PARAMETER SYMBOL UNITS VALUES (MD2:0) 0.375 t MOVX ALE Pulse Width 0.5 t 1 £ C £ 3 LHLL2 4 £ C £ 7 1.5 t - 10 0.125 t...
  • Page 6 DS80C390 Dual CAN High-Speed Microprocessor Figure 2. Multiplexed 9-Cycle Address/Data CE0-3 MOVX Read/Write Operation 6 of 54...
  • Page 7 DS80C390 Dual CAN High-Speed Microprocessor Figure 3. Multiplexed 9-Cycle Address/Data PCE0-3 MOVX Read/Write Operation 7 of 54...
  • Page 8 DS80C390 Dual CAN High-Speed Microprocessor Figure 4. Multiplexed 2-Cycle Data Memory PCE0-3 Read or Write Figure 5. Multiplexed 2-Cycle Data Memory CE0-3 Read 8 of 54...
  • Page 9 DS80C390 Dual CAN High-Speed Microprocessor Figure 6. Multiplexed 2-Cycle Data Memory CE0-3 Write Figure 7. Multiplexed 3-Cycle Data Memory PCE0-3 Read or Write 9 of 54...
  • Page 10 DS80C390 Dual CAN High-Speed Microprocessor Figure 8. Multiplexed 3-Cycle Data Memory CE0-3 Read Figure 9. Multiplexed 3-Cycle Data Memory CE0-3 Write 10 of 54...
  • Page 11 DS80C390 Dual CAN High-Speed Microprocessor Figure 10. Multiplexed 9-Cycle Data Memory PEC0-3 Read or Write Figure 11. Multiplexed 9-Cycle Data Memory CE0-3 Read 11 of 54...
  • Page 12 DS80C390 Dual CAN High-Speed Microprocessor Figure 12. Multiplexed 9-Cycle Data Memory CE0-3 Write 12 of 54...
  • Page 13 DS80C390 Dual CAN High-Speed Microprocessor ELECTRICAL CHARACTERISTICS—(NONMULTIPLEXED ADDRESS/DATA BUS) (Note 13) 40MHz VARIABLE CLOCK PARAMETER SYMBOL CONDITIONS UNITS External oscillator Oscillator Frequency 1 / t CLCL External crystal PSEN Pulse Width 0.5 t PLPH PSEN Low to Valid Instruction In 0.5 t...
  • Page 14 DS80C390 Dual CAN High-Speed Microprocessor MOVX CHARACTERISTICS (NONMULTIPLEXED ADDRESS/DATA BUS) STRETCH PARAMETER SYMBOL UNITS VALUES (MD2:0) 0.5 t RD Pulse Width RLRH 1 £ C £ 7 0.5 t WR Pulse Width WLWH 1 £ C £ 7 0.5 t...
  • Page 15 DS80C390 Dual CAN High-Speed Microprocessor Figure 14. Nonmultiplexed 9-Cycle Address/Data CE0-3 MOVX Read/Write Operation 15 of 54...
  • Page 16 DS80C390 Dual CAN High-Speed Microprocessor Figure 15. Nonmultiplexed 9-Cycle Address/Data PCE0-3 MOVX Read/Write Operation 16 of 54...
  • Page 17 DS80C390 Dual CAN High-Speed Microprocessor Figure 16. Nonmultiplexed 2-Cycle Data Memory PCE0 Read or Write Figure 17. Nonmultiplexed 2-Cycle Data Memory CE0-3 Read 17 of 54...
  • Page 18 DS80C390 Dual CAN High-Speed Microprocessor Figure 18. Nonmultiplexed 2-Cycle Data Memory CE0-3 Write Figure 19. Nonmultiplexed 3-Cycle Data Memory PEC0-3 Read or Write 18 of 54...
  • Page 19 DS80C390 Dual CAN High-Speed Microprocessor Figure 20. Nonmultiplexed 3-Cycle Data Memory CE0-3 Read Figure 21. Nonmultiplexed 3-Cycle Data Memory CE0-3 Write 19 of 54...
  • Page 20 DS80C390 Dual CAN High-Speed Microprocessor Figure 22. Nonmultiplexed 9-Cycle Data Memory PCE0-3 Read or Write Figure 23. Nonmultiplexed 9-Cycle Data Memory CE0-3 Read 20 of 54...
  • Page 21 DS80C390 Dual CAN High-Speed Microprocessor Figure 24. Nonmultiplexed 9-Cycle Data Memory CE0-3 Write TIME PERIODS SYSTEM CLOCK SELECTION 4X/2X CLCL CLCL CLCL 1024 t CLCL EXTERNAL CLOCK CHARACTERISTICS PARAMETER SYMBOL UNITS Clock High Time CHCX Clock Low Time CLCX Clock Rise Time...
  • Page 22 DS80C390 Dual CAN High-Speed Microprocessor SERIAL PORT MODE 0 TIMING CHARACTERISTICS PARAMETER SYMBOL CONDITIONS UNITS SM2 = 0:2 clocks per cycle 12 t CLCL Serial Port Clock Cycle Time XLXL SM2 = 1:4 clocks per cycle CLCL SM2 = 0:12 clocks per cycle...
  • Page 23 DS80C390 Dual CAN High-Speed Microprocessor Figure 26. Serial Port 0 (Synchronous Mode) HIGH-SPEED OPERATION, TXD CLK = XTAL/4 (SM2 = 1) TRADITIONAL 8051 OPERATION, TXD CLOCK = XTAL/12 (SM2 = 0) 23 of 54...
  • Page 24 DS80C390 Dual CAN High-Speed Microprocessor POWER-CYCLE TIMING CHARACTERISTICS PARAMETER SYMBOL UNITS Crystal Startup Time (Note 14) Power-On Reset Delay (Note 15) 65,536 CLCL Note 14: Startup time for crystals varies with load capacitance and manufacturer. Time shown is for an 11.0592MHz crystal manufactured by Fox Electronics.

  • Page 25: Pin Description

    DS80C390 Dual CAN High-Speed Microprocessor PIN DESCRIPTION NAME FUNCTION LQFP PLCC 8, 22, 40, 17, 32, 51, 9, 25, 41, 1, 18, 35, Digital Circuit Ground Address Latch Enable, Output. When the MUX pin is low, this pin outputs a clock to latch the external address LSB from the multiplexed address/data bus on Port 0.
  • Page 26 DS80C390 Dual CAN High-Speed Microprocessor PIN DESCRIPTION (continued) NAME FUNCTION LQFP PLCC Port 1, I/O. Port 1 can function as an 8-bit bidirectional I/O port, the nonmultiplexed A0–A7 signals (when the MUX pin = 1), and as an alternate interface for internal resources. Setting the SP1EC bit relocates RXD1 and TXD1 to Port 5.
  • Page 27 CAN interface, or as peripheral enable signals. Setting the SP1EC bit will relocate the RXD1 and TXD1 functions to P5.3-P5.2 as described in the High-Speed Microcontroller User’s Guide: DS80C390 Supplement. The reset condition of Port 1 is all bits at logic 1 via a weak pullup.
  • Page 28 DS80C390 Dual CAN High-Speed Microprocessor Figure 28. Block Diagram DS80C390 28 of 54...

  • Page 29: Detailed Description

    All of the standard 8051 resources such as three timer/counters, serial port, and four 8-bit I/O ports (plus two 8-bit ports dedicated to memory interfacing) are included in the DS80C390. In addition it includes a second hardware serial port, seven additional interrupts, programmable watchdog timer, brownout monitor, power-fail reset, and a programmable output clock that supports an IrDA interface.

  • Page 30: Performance Overview

    “MOVX A, @DPTR” instruction and the “MOV direct, direct” instruction required the same amount of time: two machine cycles or 24 oscillator cycles. In the DS80C390, the MOVX instruction takes as little as two machine cycles, or eight oscillator cycles, but the “MOV direct, direct” uses three machine cycles, or 12 oscillator cycles.
  • Page 31 DS80C390 Dual CAN High-Speed Microprocessor Table 1. SFR Locations REGISTER BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 ADDRESS P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 DPL1 DPH1 — — — — PCON SMOD_0 SMOD0 OFDF OFDE STOP IDLE...
  • Page 32 DS80C390 Dual CAN High-Speed Microprocessor Table 1. SFR Locations (continued) REGISTER BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 ADDRESS C0M14C MSRDY INTRQ EXTRQ MTRQ ROW/TIH DTUP C0M15C MSRDY INTRQ EXTRQ MTRQ ROW/TIH DTUP SCON1 SM0/FE_1 SM1_1 SM2_1 REN_1 TB8_1...
  • Page 33 DS80C390 Dual CAN High-Speed Microprocessor ON-CHIP ARITHMETIC ACCELERATOR An on-chip math accelerator allows the microcontroller to perform 32-bit and 16-bit multiplication, division, shifting, and normalization using dedicated hardware. Math operations are performed by sequentially loading three special registers. The mathematical operation is determined by the sequence in which three dedicated SFRs (MA, MB, and MC) are accessed, eliminating the need for a special step to choose the operation.

  • Page 34: Memory Addressing

    The 22-bit paged-address mode retains binary-code compatibility with the 8051 instruction set, but adds one machine cycle to the ACALL, LCALL, RET, and RETI instructions with respect to Dallas Semiconductor’s High- Speed Microcontroller family timing. This is transparent to standard 8051 compilers. Interrupt latency is also increased by one machine cycle.
  • Page 35 WR , RD , or PSEN strobes. The DS80C390 can configure its 4kB of internal SRAM as combined program and data memory. This allows the application software to execute self-modifiable code. The technique loads the 4kB SRAM with bootstrap loader software, and then modifies the IDM1 and IDM0 bits to map the 4kB starting at memory location 40000h.
  • Page 36 200000h–2FFFFFh 300000h–3FFFFFh The DS80C390 incorporates a feature allowing PCE and CE signals to be combined. This is useful when incorporating modifiable code memory as part of a bootstrap loader or for in-system reprogrammability. Setting the PDCE3–0 (MCON.3–0) bits causes the corresponding chip-enable signal to function for both MOVC and MOVX operations.
  • Page 37 (MOVX) moves by using one data pointer as a source register and the other as the destination register. DPTR0 is located at the same address as the original 8051 data pointer, allowing the DS80C390 to execute standard 8051 code with no modifications. The second data pointer, DPTR1, is split between the DPH1 and DPL1 SFRs, similar to the DPTR0 configuration.
  • Page 38 INC DPTR CLOCK CONTROL AND POWER MANAGEMENT The DS80C390 includes a number of unique features that allow flexibility in selecting system clock sources and operating frequencies. To support the use of inexpensive crystals while allowing full speed operation, a clock multiplier is included in the processor’s clock circuit.
  • Page 39 DS80C390 Dual CAN High-Speed Microprocessor the microcontroller can never be operated faster than 40MHz. This means that the maximum crystal oscillator or external clock source is 10MHz when using the 4X setting, and 20MHz when using the 2X setting. The primary advantage of the clock multiplier is that it allows the microcontroller to use slower crystals to achieve the same performance level.

  • Page 40: Idle Mode

    DS80C390 Dual CAN High-Speed Microprocessor POWER MANAGEMENT MODE (PMM) AND SWITCHBACK Power consumption in PMM is less than in idle mode, and approximately one quarter of that consumed in divide- by-four mode. While PMM and Idle modes leave the power-hungry internal timers running, PMM runs all clocked functions such as timers at the rate of crystal divided by 1024, rather than crystal divided by 4.

  • Page 41: Stop Mode

    BANDGAP SELECT The DS80C390 provides two enhancements to stop mode. As described below, the device provides a band-gap reference to determine power-fail interrupt and reset thresholds. The bandgap select bit, BGS (RCON.0), controls the bandgap reference.

  • Page 42: Peripheral Overview

    The default state of ALEOFF is 0 so ALE normally toggles at a frequency of XTAL/4. PERIPHERAL OVERVIEW The DS80C390 provides several of the most commonly needed peripheral functions in microcomputer-based systems. New functions include a second serial port, power-fail reset, power-fail interrupt flag, and a programmable watchdog timer.

  • Page 43: Watchdog Timer

    The SCON0 register provides control for serial port 0 while its I/O buffer is SBUF0. The registers SCON1 and SBUF1 provide the same functions for the second serial port. A full description of the use and operation of both serial ports can be found in the High-Speed Microcontroller User’s Guide: DS80C390 Supplement. WATCHDOG TIMER The watchdog is a free-running, programmable timer that can set a flag, cause an interrupt, and/or reset the microcontroller if allowed to reach a preselected timeout.

  • Page 44: Power-Fail Reset

    EXTERNAL RESET PINS The DS80C390 has reset input (RST) and reset output ( RSTOL ) pins. The RSTOL pin supplies an active-low reset when the microprocessor is issued a reset from either a high on the RST pin, a timeout of the watchdog timer, a crystal oscillator fail, or an internally detected power fail.
  • Page 45 CONTROLLER AREA NETWORK (CAN) MODULE The DS80C390 incorporates two CAN controllers that are fully compliant with the CAN 2.0B specification. CAN is a highly robust, high-performance communication protocol for serial communications. Popular in a wide range of applications including automotive, medical, heating, ventilation, and industrial control, the CAN architecture allows for the construction of sophisticated networks with a minimum of external hardware.
  • Page 46 Note that setting the CMA bit employs a special 23rd address bit that is only used for addressing CAN MOVX memory. The DS80C390’s internal architecture requires that the device be in one of the two 22-bit addressing modes when the CMA bit is set to correctly use the 23rd bit and access the CAN MOVX memory.
  • Page 47 DS80C390 Dual CAN High-Speed Microprocessor MOVX MESSAGE CENTERS FOR CAN 0 CAN 0 CONTROL/STATUS/MASK REGISTERS MOVX DATA REGISTER ADDRESS C0MID0 MID07 MID06 MID05 MID04 MID03 MID02 MID01 MID00 xxxx00h C0MA0 M0AA7 M0AA6 M0AA5 M0AA4 M0AA3 M0AA2 M0AA1 M0AA0 xxxx01h C0MID1...
  • Page 48 DS80C390 Dual CAN High-Speed Microprocessor MOVX MESSAGE CENTERS FOR CAN 1 CAN 1 CONTROL/STATUS/MASK REGISTERS MOVX DATA REGISTER ADDRESS C1MID0 MID07 MID06 MID05 MID04 MID03 MID02 MID01 MID00 xxxx00h C1MA0 M0AA7 M0AA6 M0AA5 M0AA4 M0AA3 M0AA2 M0AA1 M0AA0 xxxx01h C1MID1...
  • Page 49 Note that message center 15 can only be used in a receive mode. To avoid a priority inversion, the DS80C390 CAN processors are configured to reload the transmit buffer with the message of the highest priority (lowest message center number) whenever an arbitration is lost or an error condition occurs.
  • Page 50 DS80C390 Dual CAN High-Speed Microprocessor Table 14. Arbitration/Masking Feature Summary ARBITRATION TEST NAME MASK REGISTERS CONTROL BITS AND CONDITIONS REGISTERS Standard Global Mask EX/ST = 0 Message Center Registers 0–1 MEME = 0: Mask register ignored. ID and Standard 11-Bit Arbitration Registers 0–1...

  • Page 51: Bit Timing

    DS80C390 Dual CAN High-Speed Microprocessor MESSAGE BUFFERING/OVERWRITE If a message center is configured for reception (T/ R = 0) and the previous message has not been read (DTUP = 1), then the disposition of an incoming message to that message center is controlled by the WTOE bit (located in CAN Arbitration Register 3 of each message center).

  • Page 52: Revision History

    DS80C390 Dual CAN High-Speed Microprocessor REVISION HISTORY REVISION DESCRIPTION 062299 Initial preliminary release. Clarifies that unused/unimplemented bits in the CAN MOVX SRAM read 0. 090799 Corrected the t time period table. Corrected multiplexed 2-cycle date memory CEO-3 read figure to show RD and WR inactive.

  • Page 53: Package Information

    DS80C390 Dual CAN High-Speed Microprocessor PACKAGE INFORMATION (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/DallasPackInfo.) 53 of 54...
  • Page 54 M a x i m I n t e g r a t e d P r o d u c t s , 1 2 0 S a n G a b r i e l D r i v e , S u n n y v a l e , C A 9 4 0 8 6 4 0 8 - 7 3 7 - 7 6 0 0 © 2005 Maxim Integrated Products · Printed USA The Maxim logo is a registered trademark of Maxim Integrated Products, Inc. The Dallas logo is a registered trademark of Dallas Semiconductor Corp.

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