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MN662748RPMFA (IC651) : DSP
1. Terminal layout
80~61
1
60
20
41
21~40
2. Pin function
Pin
Symbol
I/O
No
1 BCLK
2 LRCK
3 SRDATA
4 DVDDI
5 DVSSI
6 TX
7 MCLK
8 MDATA
9 MLD
10 SENSE
11 FLOCK
12 TLOCK
13 BLKCK
14 SQCK
15 SUBQ
16 DMUTE
17 STAT
18 RST
19 SMCK
20 PMCK
21 TRV
22 TVD
23 PC
24 ECM
25 ECS
26 KICK
27 TRD
28 FOD
29 VREF
30 FBAL
31 TBAL
32 FE
33 TE
34 RFENV
35 VDET
36 OFT
37 TRCRS
38 /RFDET
39 BDO
40 LDON
Function
-
Not use
-
Not use
-
Not use
-
Power supply for digital circuit
-
GND for digital circuit
-
Not use
I
Micro computer command
clock signal input
I
Micro computer command
data input
I
Micro computer command
load signal input (L: Load)
-
Not use, connect to TP716
-
Not use, connect to TP717
-
Not use, connect to TP718
O
Sub code block clock
signal output
I
External clock input for sub
code Q register input
O
Sub code Q data output
-
Not use, connect to TP719
O
Status signal input
I
Reset signal input (L: Reset)
-
Not use
-
Not use, connect to TP720
O
Traverse enforced output
O
Traverse drive output
-
Not used
O
Spindle motor drive signal
(Enforced mode output)
O
Spindle motor drive signal
(Servo error signal output)
O
Kick pulse output
O
Tracking drive output
O
Focus drive output
I
Reference voltage
for D/A output block
O
Focus balance adjust
signal output
O
Tracking balance adjust
signal output
I
Focus error signal input
(Analog input)
I
Tracking error signal input
(Analog input)
I
RF envelope signal input
(Analog input)
I
Vibration detect signal
input (H:Detect)
I
Off track signal input
(H:Off track)
I
Track cross signal input
I
RF detect signal input
(L:Detect)
Drop out signal input
I
(H:Drop out)
O
Laser on signal output
(H:ON)
Pin
Symbol
I/O
No
41 PLLF2
-
Not use
42 TOFS
-
Not use
43 WVEL
-
Not use
44 ARF
I
RF signal input
45 IREF
I
Reference current input
46 DRF
I
Bias pin for DSL
47 DSLF
I/O
Loop filter pin for DSL
Loop filter pin for PLL
48 PLLF
I/O
49 VCOF
I/O
Loop filter pin for VCO
50 AVDD2
-
Power supply for analog
circuit
GND for analog circuit
51 AVSS2
-
52 EFM
-
Not use, connect to TP724
53 PCK
O
Clock output for PLL
Loop filter pin for Digital
54 VCOF2
I/O
servo VCO
55 SUBC
-
Not use
56 SBCK
-
Not use
GND for crystal oscillation
57 VSS
-
circuit
58 X1
I
Input for crystal oscillation
circuit (f=16.9344MHz)
Output for crystal oscillation
59 X2
O
circuit (f=16.9344MHz)
Power supply for crystal
60 VDD
-
oscillation circuit
Not use
61 BYTCK/TRVSTP
-
62 CLDCK
O
Sub code frame clock
signal output
Not used
63 FCLK
-
Interpolation flag signal
64 IPFLAG
O
output, Connect to TP721
Flag signal output,
65 FLAG
O
Connect to TP722
66 CLVS
-
Not use
Not use
67 CRC
-
De-emphasis detect signal
68 DEMPH
O
output, Connect to TP723
Not use
69 RESY
-
Mode select pin, Connect
70 IOSEL
I
to DVDD1 (H fix)
Test pin, Connect to
71 /TEST
I
DVDD1 (H fix)
Power supply for analog
72 AVDD1
-
circuit
L-channel audio output
73 OUTL
O
GND for analog circuit
74 AVSS1
-
R-channel audio output
75 OUTR
O
RF signal polarity setting pin,
76 RSEL
I
Connect to DVDD1 (H fix)
Oscillation frequency setting
77 CSEL
I
pin, Connect to GND (L fix)
IOSEL=H, Test pin,
78 PSEL
I
Connect to GND (L fix)
IOSEL=H, SMCK output,
79 MSEL
I
Frequency select pin
IOSEL=H, SMCK output,
80 SSEL
I
SUBQ output mode select pin
UX-L40/UX-L30
Function
1-31
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