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Kortek P42SV Service Manual

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Manual
SERVICE
Model: P42SV
CONTENTS
Plasma Display

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Summary of Contents for Kortek P42SV

  • Page 1: Table Of Contents

    Manual SERVICE Model: P42SV CONTENTS 1. Precautions 2. Reference Informations Plasma Display 3. Electrical Specifications 4. Alignment and Adjustments 5. Circuit Description 6. Remote Control 7. Installation 8. Wiring Diagram 9. TroubleShooting Intro 10. TroubleShooting 11. Glossary...
  • Page 2 Kortek.co.kr May. 2003 Printed in korea...

  • Page 3: Precautions

    5.3 Logic Part… p36 5.3.1 Block Diagram and Configuration of Logic MAIN Board 5.3.2 An Explanation of logic main board by the block… p37 5.3.3 How to select internal/external CLOCK & NTSC/PAL… p46 Kortek corporation 2 of 99 PDP R&D Center...
  • Page 4 10.7 Abnormal Open… p77 10.7.1 R_Data Address Open… p78 10.7.2 G-Data Address Open… p79 10.7.3 B-Data Address Open… p80 10.7.4 Block Address Open… p82 10.8 Address Short… p84 10.9 Abnormal Address… p85 11. Glossary… Kortek corporation 3 of 99 PDP R&D Center...

  • Page 5: Safety Precautions

    6. Antenna Cold Check: With the unit’ s AC plug disconnected from the AC source, connect an electrical jumper across the two AC prongs. Connect one lead of the ohmmeter to an AC prong. Connect the other lead to the coaxialconnector. Kortek corporation 4 of 99 PDP R&D Center...
  • Page 6 15. Picture Tube Implosion Warning: The picture tube in this receiver empolys “ integral implosion” protection. To ensure continued implosion protection, make sure that the replacement picture tube is the same as the original. Kortek corporation 5 of 99 PDP R&D Center...
  • Page 7 Use replacement components that have the same ratings, especially for flame resistance and dielctric strength specifications. A replacement part that does not have the same safety characteristics as the original might create shock, fire or other hazards. Kortek corporation 6 of 99 PDP R&D Center...

  • Page 8: Servicing Precautions

    This happens due to the degradation of brightness caused by a scale-down effect. To prevent such afterimages when displaying a same picture for a certain time, be sure to reduce the level of brightness and contrast. Kortek corporation 7 of 99 PDP R&D Center...

  • Page 9: Precautions For Electrostatically Sensitive Devices(Esds)

    9. Minimize body motions when handling unpackaged replacement ESDs. Motions such as brushing clothes together, or lifting a foot from a carpeted floor can generate enough static electricity to damage an ESD. Kortek corporation 8 of 99 PDP R&D Center...

  • Page 10: Tables Of Abbreviations And Acronyms

    Inches Per Second Millisecond Kilowatt-hour Millivolt Kilogram nanofarad Kilohertz Ω KΩ Kilohm Picofarad Kilometer Pound Km/h Kilometer Per Hour Revolutions Per Minute Kilovolt Revolution per Second Kilowatt Second(Time) Liter Volt Megahertz Volt-ampere Watt-hour Watt Kortek corporation 9 of 99 PDP R&D Center...
  • Page 11 Variable Capacitance Diode Fail Safe Voltage Controlled Oscillator Ground VCXO Voltage Controlled Crystal Oscillator Green-Y Very High Frequency High-Frequency Video Intermediate Frequency Inductance-Capacitance Variable Resistor Integrated Circuit Video Tape Recoder Intermediate Frequency Transistor Kortek corporation 10 of 99 PDP R&D Center...

  • Page 12: Block Diagram

    3. Electrical Specifications 3.1. Block Diagram Kortek corporation 11 of 99 PDP R&D Center...

  • Page 13: Display Performance

    Number of Color Brightness Typical 400cd/㎡(PC MODE, LVDS input) (Peak Brightness) Contrast Ratio Typical 550:1 (in dark room) Chromaticity Coordinates White : X = 0.285±0.03 Y = 0.290±0.03 (Typical Value) Over 160° Viewing Angle Kortek corporation 12 of 99 PDP R&D Center...

  • Page 14: Power

    ▶ This occurs when move the computer’s mouse or press a key on the keyboard. ▶ For energy conservation, turn your monitor OFF when it is not needed, or when leaving it unattended for long periods. Kortek corporation 13 of 99 PDP R&D Center...

  • Page 15: Input Power Connector Location

    * The Input Power Connector in X-Drive Board is named as “SX”. * The Input Power Connector in Logic Board is named as “SL”(The Column Drive Board is named as “BUFFER”). * “SI” is same “SA”. Kortek corporation 14 of 99 PDP R&D Center...

  • Page 16: Input Power Voltage Source And Pin Assignment

    V5d1 V12A ConnectorName 79Vscan 190Ve RELAY GND-A (Buffer) Voltage VAMP Connection Source 220Vset 79Vscan FAN_DET VAMP 70Va GND_A GNDS 70Va Connection GND_A GNDS Connection 165Vs Connection 165Vs 165Vs V12(A) 165Vs 165Vs 165Vs Kortek corporation 15 of 99 PDP R&D Center...

  • Page 17: Video

    75Hz 75Hz 85Hz 85Hz 85Hz 60Hz 1024 1024 1024 1024 Time19 48.363 56.476 37.500 46.875 60.023 43.269 53.674 68.677 31.723 Optional 60.004 70.069 75.000 75.000 75.029 85.008 85.061 84.997 59.968 H-Sync V-Sync Kortek corporation 16 of 99 PDP R&D Center...

  • Page 18: Image Outputs Specification

    Auto Adjustment(Gain/Phase/Frequency/Position)/Aspect Ratio Control/Time & Sleep Time Function Setting(RTC) Basic Audio Effect Adjustment(Volume, Balance, Treble, Gbass, Middle) DDC2B Power Save Power Saving Mode Pixel Shift 4Pixels(left,right,up,down), 4min External RS232C (Controlled by PC), 1:1 Kortek corporation 17 of 99 PDP R&D Center...

  • Page 19: Pin Assignment

    LUMA I2C_SDA CHROMA R_GND G_GND I2C_SCA DET_SVHS B_GND RCA Video Jack RCA 233 Phone Jack RCA 3-Din Jack Signal Name Signal Name Signal Name Signal Name Pr(Cr) IDET_DTV/ CVBS Signal IDET_CVBS Pb(Cb) Kortek corporation 18 of 99 PDP R&D Center...

  • Page 20: Alignment And Adjustments

    Enable to increase and decrease the data of the selected items ▶ Notice: In case of no signal in DTV MODE or PC MODE, entry into the FACTORY MODE cannot be mode. Kortek corporation 19 of 99 PDP R&D Center...

  • Page 21: White Balance Adjust Method

    Y: 1.2[cd/m ±0.2 2. PC MODE Adjustment Coordinates Coordinates Value Adjustment Deviation x: 275 ±3 H-LIGHT y: 280 ±3 Y: 90[cd/m ±1 x: 280 ±5 L-LIGHT y: 275 ±5 Y: 6[cd/m ±0.5 Kortek corporation 20 of 99 PDP R&D Center...

  • Page 22: Discharge Voltage Adjustment Method

    -Voltage adjustment is made for Vs by using VR8003. -Standard voltage for Va is 165V±5V. ● Ve Adjustment Method -Voltage adjustment is made for Vs by using VR8001. -Standard voltage for Va is 190V±5V. Kortek corporation 21 of 99 PDP R&D Center...

  • Page 23: Fault Finding Using Multimeter

    C (COLLECTOR) B (BASE) E (EMITTER) Forward Direction Reverse Direction Between B and E Hundreds of ohms Infinity Between B and C Hundreds of ohms Infinity Between E and C Infinity Infinity Kortek corporation 22 of 99 PDP R&D Center...
  • Page 24 By measuring the DIODE. Forward Direction Hundreds of ohms Varying depending on IC but generally normal Reverse Direction Infinity in DIODE TEST MODE * Defects have SHORT(0 ohm) for both forward and reverse direction Kortek corporation 23 of 99 PDP R&D Center...

  • Page 25: Circuit Description

    ⑤ Y-Buffer(Upper, Lower): It is a Board applying Scan waveform to Y terminal and it consist of Upper Board and two Lower Boards. 8 Scan Driver ICs (ST company’s STV7617: 64 or 65 Output) are mounted in it. Kortek corporation 24 of 99 PDP R&D Center...

  • Page 26: Power Supply

    Flyback system having simple circuits. For the high frequency of international standard and the improvement of reverse rate, AC input is used as an input of the switching regulator when +340V DC Voltage is generated by using Active PFC(Power Factor Correction). Kortek corporation 25 of 99 PDP R&D Center...

  • Page 27: Smps Specification

    5.1.3 SMPS Specification (1) Input The P42SV board should be designed so that the AC power supply within the 90VAC(common) to 240V and the input frequency within 50/60Hz±3Hz can be applied (2) Output The P42SV board converts the AC voltages(+165V,+75V,+79V,+220V,+190V,… and so on) into the DC Voltages.
  • Page 28 Feedback for stabilizing voltage is designed to 5Vd, and the power of 5Va, 9Vcc and12Vcc is obtained through transformer coupling by using each linear regulator. As it also senses PFC output voltage, it has low-voltage OFF circuit and switching frequency is 100 KHz. Kortek corporation 27 of 99 PDP R&D Center...
  • Page 29 (5) P42SV Block diagram AC Input Vs(+165V) 110V ~ 220V DC/DC Converter Vset(220V) DC/DC Converter Ve(190V) Boot PFC Vs_Switching Stage DC/DC Converter Vs(165V) Stage EMI Filter Return PWM Control Stage Auxiliary Va(+70V) Va_Switching Stage Stage Vscan(+79V) ON/OFF Relay Signal 12V(+12V)

  • Page 30: Driver Circuit

    Kortek corporation 29 of 99 PDP R&D Center...
  • Page 31 (narrow erase) or its polarity should be prevented from being charged adversely by supplying appropriate quantity of ion or electron after generating weak discharge (low low- voltage erase) Kortek corporation 30 of 99 PDP R&D Center...

  • Page 32: Drive Pulse And Functions

    The purpose of impressing the initial sustaining pulses long is to obtain stable initial discharges and generate wall electric charges as much as possible. Kortek corporation 31 of 99 PDP R&D Center...

  • Page 33: Analysis Of Driving Pulse

    - c irc u ite d , t h e r e b y c a u s i n g 1 8 0 V t o b e o u t p u t t e d t o o u t p u t t e r m inals Kortek corporation 32 of 99 PDP R&D Center...

  • Page 34: Driving Circuit Diagram

    5.2.5 Driving Circuit Diagram Vset Vscan RAMP Cvscan RAMP Cvset RAMP Kortek corporation 33 of 99 PDP R&D Center...

  • Page 35: Base Configuration & Driving Description Of Driver

    Rising S/W Input Connector Input Connector of Logic B/D & C4051 C4052 C4049 C4050 of X_driving VOLT Logic Signal *Vs/sustain, Ve/X_Rising Ramp, 5V/Logic Signal,buffer, Shade-block mean 17V/FET Gate drive Recovery CAP HEATSINK Kortek corporation 34 of 99 PDP R&D Center...
  • Page 36 Ground S/W Filter Circuit Ysp S/W Yp S/W Yp S/W Ysc S/W Y_Output 3 Y_Output 4 Y_Output 1 Y_Output 2 *Vs/sustain, Vset/Y_Rising Shade-block mean Ramp, Vdd/Logic HEATSINK Signal,buffer, Vcc/FET Gate drive, Vscan/Scan Kortek corporation 35 of 99 PDP R&D Center...

  • Page 37: Logic Part

    NTSC/PAL select Y_logic Signal Outside (CN2002) (LD2001) Output Connector(LY) (CN2001) LVDS Input Connector Inside/Outside Select-switch Address Logic Output Signal Buffer IC Logic Power Input Connector Data Memory Controller Data Clock Generator 60MHz Kortek corporation 36 of 99 PDP R&D Center...

  • Page 38: An Explanation Of Logic Main Board By The Block

    After data read from Memory are rearranged to be suitable for input FORMAT of REARRANGE DATA driver IC (COF or COB (VGA PDP having resolution of 852*480), DATA are outputted to E and F-Buffer Board Kortek corporation 37 of 99 PDP R&D Center...
  • Page 39 5.3.2(B) Data Switch DATA_SWITCH TH_SYNC_OT TV_SYNC_OT TRED_OUT[7..0] TGRN_OUT[7..0] H_SYNC_OUT TBLU_OUT[7..0] V_SYNC_OUT H_SYNC V_SYNC RED_OUT[7..0] GRN_OUT[7..0] RED_IN[7..0] BLU_OUT[7..0] GRN_IN[7..0] CLK13_OUT BLU_IN[7..0] AREA_OT DATA_SW_ID nRESET CLK26 1. Internal test pattern path 2. Scaler board’s pattern path Kortek corporation 38 of 99 PDP R&D Center...
  • Page 40 AVR_IN[11.0] vibrates on the boundary value. ● TRANS Block Transmits ADDROUT[4..0] and PEAK[2..0] data to the X/Y CONTROL block in a serial manner using 3bits of SCLK, SDATA and SCREEN. Kortek corporation 39 of 99 PDP R&D Center...
  • Page 41 ● In arraying sub-fields, A and B are basically typed, in the form of ABABAB… … for each clock or BABABA… ..for each line. ● Insert ZERO (0) to obtain time necessary for MEMORY WRITE. Inserted ZERO (0) is expressed in a horizontal time, via the SUBFIELD MATRIX. Kortek corporation 40 of 99 PDP R&D Center...
  • Page 42 ● Zero (0) inserted in the SUBFIELD GENERATOR block is expressed as a horizontal time after passing through this block, and used as a time margin for control signaling when data outputted from the SUBFIELD MATRIX block are written on 16M SGRAM. Kortek corporation 41 of 99 PDP R&D Center...
  • Page 43 DATA_OUT & & SELECT DATA OUT ADDRESS ADDRESS GEN. SELECT B PORT TRI_BUF 16MSGRAM B PORT READ nRESET CONTROL SIGNAL CONTROL SIGNAL & A PORT & ADDRESS CONTROL SIGNAL CLK26 ADDRESS GEN Kortek corporation 42 of 99 PDP R&D Center...
  • Page 44 2 SGRAMs based on V_TOGGLE signals, so that WRITE, READ CONTROL & ADDRESS can be outputted. ● TRI_BUFFER Block Controls data bus Lines according to the WRITE and READ functions applied alternately to 2 SGRAMs based on V_TOGGLE signals. Kortek corporation 43 of 99 PDP R&D Center...
  • Page 45 DATA DRIVER IC module’s (ADDRESS COB) input format and the ADDRESS CONTROL block controlling this rearrange buffer and generating control signals for the DATA DRIVER module. Their sub- blocks are the Address Control Block, the Rearrange Button Block. Kortek corporation 44 of 99 PDP R&D Center...
  • Page 46 (2) Descriptions of Block’s Functions ● Creates the counter calculating the number of sub-field. ● Creates counters necessary sections of Reset, Address and Sustain. ● Creates factors to change the cycles of Sustain and Address. Kortek corporation 45 of 99 PDP R&D Center...

  • Page 47: How To Select Internal/External Clock & Ntsc/Pal

    CN2002 has selected PAL when it is put into a warehouse When NTSC internal pattern is operated, the exchange of NTSC <-> PAL is possible. CN2002(NTSC/PAL selection switch) PAL selection NTSC selection Kortek corporation 46 of 99 PDP R&D Center...

  • Page 48: Image Board

    5.4 Image Board 5.4.1 Block Diagram VIDEO VIDEO DECODER (CVBS) (VPC3230) VIDEO SVHS DOUBLER (Y/C) (gmLVX1A-X) Y/Cb/Cr VIDEO Y/Pb/Pr PROCESSOR Generator (CXA2101) (SDA9361) Scaler PANEL (PW364) ANALOG (RGB) SWITCH (AD9884) Kortek corporation 47 of 99 PDP R&D Center...

  • Page 49: Description In Signal Process Block

    SGRAM. In addition to this video deinterlace, the gmVLX1A converts GAMMA CORRECTION and YUV into RGB and output them. Also, this video doubler is integrated with gmAFMC to improve still image, dynamic picture image and the image in the FILM mode. Kortek corporation 48 of 99 PDP R&D Center...
  • Page 50 FLASH ROM is mainly used, but one up to 8MBIT can be used according to PROGRAM and capacity of OSD DATA. The system is easy to maintain because programming can be re-done at any time using the FLASH ROM. Kortek corporation 49 of 99...

  • Page 51: Ic Line-Up

    74HCT221(Philips) MUL-BIVRA 74HC4538(ST) DTV(YPbPr) PROCESSOR CXA2101AQ (SONY) FIELD MEMORY K4E151611D (SAMSUNG) INVERTER 74F14(ST) 3D COMB VIDEO(MAIN) FILTER PROCESSOR D64082GF VPC3230 (NEC) (MICRONAS) RS232C EEPROM DRIVER 4FC216 MAX232A ASS’ Y CODE NO: LJ92-00563A Kortek corporation 50 of 99 PDP R&D Center...

  • Page 52: Logic Buffer

    6V, and the power of 75V, which is needed for Address Power of COF, are sent through LP1 Connector from F-Buffer to SAMPS and applied to Board via Damping resistance (2.2Ω )/1W). Kortek corporation 51 of 99 PDP R&D Center...

  • Page 53: Cof(Chip On Flexible)

    (50V ~ 90Vdc) is applied, 6 bit signals including CLK Signal of Logic circuit are sent, and even and odd output waveforms of a driver which outputs 96 bit signals per IC are driven. As 4 ICs are embedded per a set of COF (96*4), 384 addresses can be outputted. Kortek corporation 52 of 99 PDP R&D Center...

  • Page 54: Remote Control

    6. Remote Control Kortek corporation 53 of 99 PDP R&D Center...

  • Page 55: Installation

    Attention: Pay attention not to confuse the direction of Stand and main body. 3. Assemble with Screw contained in Accessory Box according to following drawing. 4. Put it on flat place after assembly. Kortek corporation 54 of 99 PDP R&D Center...
  • Page 56 ● Near high voltage cables. ● Around heating apparatus. (3). Install the PDP considering the construction of the wall. (4). Use only recommended parts and components for installation. 7.2.2 Parts(wall attachment panel is sold separately.) Kortek corporation 55 of 99 PDP R&D Center...
  • Page 57 4. Using the wall attachment panel, you may adjust the angle of the display from 0 to 20 degrees. The angle can be set in 5 degrees of distance each using the angle control holes on the sides of the panel. Kortek corporation 56 of 99...
  • Page 58 The insulation rubber at the top may be taken off.) Kortek corporation 57 of 99...

  • Page 59: Wiring Diagram

    8. Wiring Diagram CN5404 CN5007 CON8003(BUFFER) CON8012(SY) CN4004 LA03(to CN60) CON8005(SL) CN5008 CON8010(SX) CN5001 CN5406 CN5006 CN5405 CN5504 CN5005 CN5003 CN5002 CN5506 CON8011(to CN1(Image B/D) CON8009(to AUDIO B/D) CN4005 CN5004 CN5505 Kortek corporation 58 of 99 PDP R&D Center...

  • Page 60: Troubleshooting Intro

    Y - B / D R e p l a c e Y - B / D O u t p u t R e p l a c e P a n e l Kortek corporation 59 of 99 PDP R&D Center...

  • Page 61: Partly No Screen

    Check Video Cable 9.2.2 Power On Replace Panel 1 Block no screen Check the COF Check the COF CON Replace Corresponding Address Buffer. Check the corresponding Block no screen COF and COF CON. Kortek corporation 60 of 99 PDP R&D Center...

  • Page 62: Troubleshooting

    ■ Abnormal Address (except abnormality in Address Open or Short) FPC, COF * You should learn PBA Analysis Manual to be familiar with PBA specification and output wave form, before learn Troubleshooting Kortek corporation 61 of 99 PDP R&D Center...
  • Page 63 Protection Failure, Check LED8004(RED) Replace the B/D ④SMPS SMPS(Shutdown) & Protection light-out (Vs,Va,V5) Check /Y-Main Connector(Vs)/ Check (CN5008/13Pin) Open Output(OVP,OCP) Replace the SMPS Check output voltage of SMPS /X-Main CON(Vs)/ Check (CN4002/13Pin)Open Output(OVP,OCP) Kortek corporation 62 of 99 PDP R&D Center...

  • Page 64: No Video(Types)

    ［ Logic MAIN ］ ［ Y-MAIN ］ ［ X-MAIN ］ LED(LD2000) blinks? Check Scan Buffer Check X-Out (This shows Output Waveform Waveform action of Sync Signal) (Loc NO:Out3, 4) (Loc No: X-Out1, 2) Kortek corporation 63 of 99 PDP R&D Center...
  • Page 65 Check Output signals (Out” L,H) ②Y- Y-MAIN Y-MAIN Y-MAIN Buffer Replace the FET Y-MAIN Y-MAIN Y-MAIN Y-MAIN Check S/W_FET/ GATE-WAVE Check input Check Input voltage(1(Vdd).3(Vcc).7(Vset). (Yrr.Yr.Yfr.Yf.Ys.Yg.Yp) (21.22.24.25.28.29.30)pins 11(Vs).12(Vs).13(Vs))pins of the CN5008/CON_13pin of the CN5002/CON_30pin Kortek corporation 64 of 99 PDP R&D Center...
  • Page 66 (GATE –WAVE / 10:1) (400us/TD) 2th pin of CN5002/CON_30pin 2th pin of CN5002/CON_30pin 2th pin of CN5002/CON_30pin (400us/time DIV) ( 1us/timDVI) ( 1us/time DVI) L-Output WAVE of CN5404, H-output WAVE of CN5404, (Yrr)CN5002/CON_30pin 5405,5506,5505(12pin) 5405,5506,5505(12pin) Kortek corporation 65 of 99 PDP R&D Center...
  • Page 67 ■ The several waveforms of Y-MAIN, Y-BUFFER Board (2/2) (Yg) of CN5002/CON_30pin 21th(Yp) of CN5002/CON_30pin Out-L,H WAVE of CN5404,5405,5506,5505(12pin) Kortek corporation 66 of 99 PDP R&D Center...
  • Page 68 ②-② X-MAIN X-MAIN X-MAIN After check After check coldsoldering & coldsoldering & Pin-shorting, Pin-shorting Replace the IC Replace the IC WAVE of Xrr WAVE of Xr WAVE of Xf WAVE of Xs Kortek corporation 67 of 99 PDP R&D Center...
  • Page 69 Replace the fault-coil Oscilator ⑤ Replace the Logic fault-parts of Check Generator output (F1, F2, MAIN F1,F2,256K 256K) ⑥ Check input volt(3.3Vdc) Check IC2004 Reset(58th)-pin) Logic Check compenents (Vss(typical=3.3V)) MAIN Open/Short Logic MAIN Kortek corporation 68 of 99 PDP R&D Center...

  • Page 70: Abnormal Video

    Abnormal Video ［ Y-Main ］ ［ Logic Main］ ［ X-MAIN ］ Check Data, Check Y-Buffer output Check Control signals Control Lines waveform, Scan output (Open/Short) (Open/Short) waveform & control signals (Open/Short) Kortek corporation 69 of 99 PDP R&D Center...
  • Page 71 IC5006,5007(LV244A) 7th,9th,12th output-WAVE IC5006,5007(LV244A) 3th,5th output-WAVE Check signal(VR5001,5002) Y-MAIN Adjust the slope rising/falling slope Y-MAIN Rising SW Falling SW Output of IC5005 The slope of Output of L-Out 3th-pin output of Rising/Falling LV244A Kortek corporation 70 of 99 PDP R&D Center...
  • Page 72 Check Rising Ramp-slope Adjust the slope ② X-MAIN (VR4001) Check Operating Voltage Check input(1(Vdd),3(Vcc),5(Ve) ③ X-MAIN SPEC. ,10(Vs),11(Vs),12(Vs) )pins of → Adjust the CN4004/CON_12pin X-MAIN The slope of Rising/Falling(VR4001) Rising SW Falling SW Kortek corporation 71 of 99 PDP R&D Center...
  • Page 73 IC2001/240pin Solder (coldsoldering, insert missing, shorting) Check Delay Controller-output ④ Logic- IC2002/240pin Solder Repair MAIN (coldsoldering.solder missing. Short) Check Data Memory Controller- ⑤ Logic- output Repair MAIN IC2005,2006,2007,2008/100pin Solder(coldsoldering,solder- missing,Short) Logic MAIN Kortek corporation 72 of 99 PDP R&D Center...

  • Page 74: Sustain Open

    IC5006,5007/LV244A CN5002/CON_30pin CN5406,5506(13pin). Check STV7617 input-logic- ④ Y-Buffer Y-MAIN Y-MAIN Y-MAIN signal Check coldsoldering, Check coldsoldering, pin-shorting pin-shorting [Y-버퍼/Y-MAIN] →Replace the →Replace the IC Check contact & coldsoldering of CN5406,5506, CN5501,5503 Kortek corporation 73 of 99 PDP R&D Center...
  • Page 75 (1~28,36~40,48~77,99,100) (34,35,41,42,78,79,97,98) (34,35,41,42,78,79,97,98) ; same as STV7617 input-signal(Pin13) IC5006 3th,12th-pin IC5007/LV244A 3th-pin IC5007/LV244A 7th-pin IC5007/LV244A 9th-pin output-WAVE(4ms/Time_DIV) output-WAVE output-WAVE output-WAVE IC5006 3th-pin IC5006 5th-pin IC5006 7th,9th-pin output-WAVE(400us/Time_DIV) output-WAVE(400us/Time_DIV) output-WAVE(2ms/Time_DIV) LV244A Logic Diagram Kortek corporation 74 of 99 PDP R&D Center...

  • Page 76: Sustain Short

    Upper(IC5401,5402,5403,5404) Lower(IC5501,5502,5503,5504) Repair/Replace the IC To check IC failure, raise IC output lead from PCB pad and check the output lead waveform. In case of IC failure, Replace the IC Kortek corporation 75 of 99 PDP R&D Center...

  • Page 77: Abnormal Suatin

    IC5005,5007/LV244A of the CN5002/CON_30pin CN5406,5506(13pin) ③ Y-Buffer Y-MAIN Y-MAIN Y-MAIN Check logic signal input of STV7617 After check After check coldsoldering & coldsoldering & Pin-shorting, Pin-shorting, Replace the IC Replace the IC Kortek corporation 76 of 99 PDP R&D Center...

  • Page 78: R_Data Address Open

    ⇒ B_Data Address Open ⇒ Block Address Open ［ Logic Buffer ］ ［ COF ］ [Logic MAIN / FPC ] Check Data/Control Check Address output Check Data/Control Output waveform (384LINE) Output waveform Kortek corporation 77 of 99 PDP R&D Center...
  • Page 79 IC2024 IC2025 IC2024 FC5_Block 14,17,22,25 12,18 7,14 13,6 IC2023 IC2022 IC2023 IC2022 FC6_Blcok 30,49,54,57 3,9,16 17,11,4 IC2022 IC2021 IC2022 IC2021 FC7_Block 62,65,70,73 12,18 7,14 13,6 Check pin Open/Short → Replace the IC Kortek corporation 78 of 99 PDP R&D Center...
  • Page 80 17,2 IC2025 IC2024 IC2025 IC2024 FC5_Block 15,18,23,26 3,9,16 17,11,4 IC2023 IC2022 IC2023 IC2022 FC6_Blcok 31,50,55,58 5,12,18 15,8,2 63,66,71,74 IC2022 IC2021 IC2022 IC2021 FC7_Block 3,9,16 17,11,4 Check pin Open/Short → Replace the IC Kortek corporation 79 of 99 PDP R&D Center...
  • Page 81 IC2025 IC2024 IC2025 IC2024 FC5_Block 16,19,24,27 5,12,18 15,8,2 IC2023 IC2022 IC2023 IC2022 FC6_Blcok 32,51,56,59 7,14 13,6 17,11 IC2022 IC2021 IC2022 IC2021 FC7_Block 64,67,72,75 5,12,18 15,8,2 Check pin Open/Short → Replace the IC Kortek corporation 80 of 99 PDP R&D Center...
  • Page 82 ■ Input, Output waveform of HCT244 Input.Output-WAVE of VHCT244(Input:8th-pin, Output:12th-pin) Input.Output-WAVE of VHCT244(Input:6th-pin, Output:14th-pin) Input.Output-WAVE of VHCT244(Input:4th-pin, Output:16th-pin) Input.Output-WAVE of VHCT244(2th,18th-pin) Kortek corporation 81 of 99 PDP R&D Center...

  • Page 83: Block Address Open

    E C 3 _ B lock E C 4 _ B lock E C 5 _ B lock E C 6 _ B lock E C 7 _ B lock Check pin Open/Short → Replace the IC Kortek corporation 82 of 99 PDP R&D Center...
  • Page 84 I C 2 0 2 6 ( I n p u t ) C L K S T B P O L B L K Check pin Open/Short → Replace the IC Kortek corporation 83 of 99 PDP R&D Center...

  • Page 85: Address Short

    EC4_Block 70~75 6~11 1~20 IC2025 IC2024 IC2025 IC2024 FC5_Block 14~19,22~27 1~20 IC2023 IC2022 IC2023 IC2022 FC6_Blcok 30~32,54~59 1~20 IC2022 IC2021 IC2022 IC2021 FC7_Block 62~67,70~75 1~20 Check pin Open/Short → Replace the IC Kortek corporation 84 of 99 PDP R&D Center...

  • Page 86: Abnormal Address

    Output-WAVE of VHCT244(IC2602, Output-WAVE of VHCT244(IC2602, Output-WAVE of VHCT244(IC2603, 03,08,05,07,06,09,00/IC2700, 08,07,09,2700,05,04)-18th pin 05,06,00,2701,02,03)-18th pin 01,05,02,04,03)-3th pin Output-WAVE of VHCT244(IC2602, Output-WAVE of VHCT244(IC2602, Output-WAVE of VHCT244(IC2603, 03,08,05,07,06,09,00/IC2700,01, 08,07,09,2700,05,04)-2th pin 05,06,00,2701,02,03)-2th pin 05,02,04,03)-17th pin Kortek corporation 85 of 99 PDP R&D Center...
  • Page 87 E C 5 _ B l o c k E C 6 _ B l o c k E C 7 _ B l o c k Check pin Open/Short → Replace the IC Kortek corporation 86 of 99 PDP R&D Center...
  • Page 88 E C 3 _ B l o c k E C 5 _ B l o c k E C 7 _ B l o c k Check pin Open/Short → Replace the IC Kortek corporation 87 of 99 PDP R&D Center...

  • Page 89: Glossary

    Black substance located in between the fluorescent areas to bring about improvement in contrast by reflection ratio decline. Generally, this is striped. Bright defect : defects that occur when the image is rather bright than accurate. Kortek corporation 88 of 99 PDP R&D Center...
  • Page 90 (reger to CIE Publication 15.2, Colorimetry 1st edition 1976, 2nd edition 1986) Color depth : The number of digital bit allocated to each major color. Color gamut : Physically realizable color space area. Kortek corporation 89 of 99 PDP R&D Center...
  • Page 91 Wave form for data electrode that switches from off to on. Data erase pulse : Wave form for data electrode that switches from on to off. DC PDP : Display panel whose plasma discharge is driven by direct current. Kortek corporation 90 of 99 PDP R&D Center...
  • Page 92 (Ambiguous expression. Reger to dot, cell pitch, pixel pitch and subpixel pitch.) Driving waveform : Expressing ∞Ê? ? change of driving signal voltage. Driving scheme : Expressing the thought applying driving voltage to display. Kortek corporation 91 of 99 PDP R&D Center...
  • Page 93 Gray scale : The range of luminance acquired when displayed from black to white. High strain point glass : Glass of which strain point (temperature with viscosity of 1014.5 poise) is relatively high Kortek corporation 92 of 99 PDP R&D Center...
  • Page 94 The disparity between the maximum sustained voltage for keeping discharge and the sustained voltage for turning off the cells. Memory type PDP : Refer to AC Plasma Panel that has memory. PDP made up of cells that keep turned on or off until switch occurs. Kortek corporation 93 of 99 PDP R&D Center...
  • Page 95 Expression of sub pixels within a pixel. Pixel count : The number of pixel that make up a display. It is described as the number of column pixels against the number of row pixels. Kortek corporation 94 of 99 PDP R&D Center...
  • Page 96 Electrodes of the pair of sustained electrodes the inject discharge downward along the panel columns. Scan pulse : Waveform that injects discharge with new columns. Optic defects where scratches display over certain size. Kortek corporation 95 of 99 PDP R&D Center...
  • Page 97 The disparity between sustained voltage that keeps turned on cells and sustained voltage that can turn off cells. Sustain pulse : Sustained drive waveform[symbol : Ps] Sustain voltage : Voltage level of sustained waveform Kortek corporation 96 of 99 PDP R&D Center...
  • Page 98 Curve expressed with wall transfer that is caused by any changes in electric charges including wall charges and wall charge pulse related parameters. White back : White coating for minimize absorbing valid gloss, located black contrast improvement layer and fluorescent material. Write electrode : (Refer to data electrode) Kortek corporation 97 of 99 PDP R&D Center...
  • Page 99 : (Refer to data electrode) [symbol :: Pw] Write electrode : (Refer to data electrode)[symbol : Vw] Kortek corporation 98 of 99 PDP R&D Center...

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