IEI Technology WAFER-C400EV User Manual

Low power intel mobile cpu with svga, lan, usb2.0, pc-104, sbc

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WAFER-C400EV
User Manual
Version 1.0
Low Power Intel Mobile CPU
with SVGA, LAN, USB2.0, PC-104, SBC
March 10, 2004
©Copyright 2004 by ICP Electronics Inc. All Rights Reserved.

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Summary of Contents for IEI Technology WAFER-C400EV

  • Page 1 WAFER-C400EV User Manual Version 1.0 Low Power Intel Mobile CPU with SVGA, LAN, USB2.0, PC-104, SBC March 10, 2004 ©Copyright 2004 by ICP Electronics Inc. All Rights Reserved.
  • Page 2 Trademarks WAFER-C400EV is a registered trademark of ICP Electronics Inc. IBM PC is a registered trademark of International Business Machines Corporation. Intel is a registered trademark of Intel Corporation. Other product names mentioned herein are used for identification purposes only and may be trademarks and/or registered trademarks of their respective companies.
  • Page 3: Table Of Contents

    Table of Contents CHAPTER 1 INTRODUCTION ............. 4 ................5 PECIFICATIONS ...............6 ACKAGE ONTENTS CHAPTER 2 INSTALLATION .............. 7 & B .............7 LOCK IAGRAM OARD AYOUT ..............9 NPACKING RECAUTIONS DRAM ..............9 YSTEM EMORY ............9 ATCH IMER ETTING CMOS S ..............9 LEAR ETUP LCD VCC V ............
  • Page 4 ................24 SING ETUP ................24 ETTING ................25 CMOS S .............. 27 TANDARD ETUP CMOS S .............. 28 DVANCED ETUP ............. 32 DVANCED HIPSET ETUP ............33 OWER ANAGEMENT ETUP 4.10 PCI / P ............35 LUG AND ETUP 4.11 ..............
  • Page 5: Chapter 1 Introduction

    Chapter 1 Introduction WAFER-C400EV is designed for network applications. It supports the full functions of an AT/ATX-compatible industrial computer on a single board. The WAFER-C400EV is equipped with a low-power consumption and high performance Intel Mobile processor on board. It also contains an SDRAM SODIMM socket that support up to 512MB memory.
  • Page 6: Specifications

    Specifications ® CPU:Embedded Intel Ultra Low Voltage Celeron 400MHz System Memory: One 144-pin SODIMM socket support up to 512 MB SDRAM BIOS: AMI 256 KB Flash memory Display Controller: VIA 8601T Support 24-bit TFT LCD panel resolution up to 1024x768 @ 60Hz Support non-interlaced CRT monitors resolutions up to 1600x1280 @ 16bit colors IDE Interface: Supports two ATA100 IDE hard drives...
  • Page 7: Package Contents

    Package Contents Before any installation, please check if the following materials are included in the package: One WAFER-C400EV all-in-one single board computer One compact disk for utility and drivers One 2.5" IDE flat cable (44-pin 2.0mm pitch to 40-pin 2.54mm pitch) One floppy cable (for 3.5"...
  • Page 8: Chapter 2 Installation

    Chapter 2 Installation This chapter gives instructions about how to set up the WAFER-C400EV hardware, including directions of setting jumpers and connecting peripherals, switches and indicators. Before installation, please pay attention to the unpacking precautions on the following page for safety.
  • Page 9 BOARD LAYOUT BOARD DIMENSION – SIDE VIEW BOARD DIMENSION...
  • Page 10: Unpacking Precautions

    Ground yourself to remove any static charge before touching the WAFER-C400EV SBC. You can do it by using a grounded wrist strap at all times or by frequently touching any conducting materials that is connected to the ground.
  • Page 11: Lcd Vcc Voltage Selector

    LCD VCC Voltage Selector The LCD interface connector JP2 can provide 5V or 3.3V power supply by selecting the JP2 to meet the different LCD requirement. JP2: LCD VCC Voltage Selector DESCRIPTION 3.3V System Panel Connectors (CN9) Pin 1-3 System power LED connector Pin 5-7 ATX power on button Pin 9-11 IDE active LED connector Pin 2-8 External speaker connector...
  • Page 12: Chapter 3 Connection

    Chapter 3 Connection This chapter describes how to connect peripherals, switches and indicators to the WAFER-C400EV board. 3.1 Floppy Disk Drive Connector (FDD1) WAFER-C400EV board is equipped with a 34-pin daisy-chain driver connecting cable. FDD1: FDC CONNECTOR DESCRIPTION DESCRIPTION GROUND...
  • Page 13: Pci E-Ide Disk Drive Connector (Ide1)

    3.2 3.2 PCI E-IDE Disk Drive Connector (IDE1) For IDE HDD connection, the WAFER-C400EV was designed with one 2.0mm connector (IDE1), which could be converted to two 2.54mm standard IDE connectors via proprietary cable. Using this cable the user can attach two IDE hard disk drives to the WAFER-C400EV.
  • Page 14: Compact Flash Connector(Cn12)

    3.3 Compact Flash Connector(CN12) You can attach one Compact Flash Disk to CN12 that occupies the secondary IDE channel. The CN12 supports both the TYPE II and TYPE I module. CN12: Compact Flash Connector (Secondary IDE) DESCRIPTION DESCRIPTION GROUND VCC-IN CHECK1 DATA 3 DATA 11 DATA 4...
  • Page 15: Parallel Port (Cn10)

    3.4 Parallel Port (CN10) This port is usually connected to a printer. The WAFER-C400EV includes an on-board parallel port (CN10), accessed through a 26-pin flat-cable connector. CN10: Parallel Port Connector DESCRIPTION DESCRIPTION STROBE# DATA 0 DATA 1 DATA 2 DATA 3...
  • Page 16: Serial Posts (Com1,Cn4)

    3.5 Serial Posts (Com1,CN4) The WAFER-C400EV offers two high speed NS-16C-550 compatible UARTS with Read/Receive 16 byte FIFO serial ports, and supports RS-422/485 mode from CN4 Pin11~14 by setting J4 connector. These ports let you connect to serial devices or a communication network. The J3 header also provides a 1A-fuesd +5V or +12V power out from CN4 pin 8.
  • Page 17: Keyboard & Ps/2 Mouse Connector (Cn11)

    USBGND2 3.8 IrDA Infrared Interface Port (CN5) The WAFER-C400EV has a built-in IrDA port which supports Serial Infrared (SIR) or Amplitude Shift Keyed IR (ASKIR) interface. To use the IrDA port, the system has to be set to SIR or ASKIR model in the BIOS’s Peripheral.
  • Page 18: Vga Connector (Vga1)

    3.9 VGA Connector (VGA1) The WAFER-C400EV has a built-in 15-pin VGA connector accepting the CRT monitor. VGA1: 15-pin D-Sub Connector DESCRIPTION DESCRIPTION GREEN GROUND BLUE DDCDAT GROUND HSYNC GROUND VSYNC GROUND DDCCLK GROUND 3.10 LAN RJ45 Connector (P1,P2) The WAFER-C400EV has two built-in RJ-45 LAN connectors for 10/100Mbps Ethernet connection.
  • Page 19: Lcd Interface Connector (Cn8)

    3.11 LCD Interface Connector (CN8) The WAFER-C400EV provides a 2x25-pin connector for the LCD flat panel interface. The TTL signal connecting interfaces locate on CN8.The display options need to be setup manually from BIOS. The BIOS “Integrated Peripheral” Setup will allow you to choose display resolution either 640x480 or 800x600 or 1024x768.
  • Page 20: External Power Connector (Cn7)

    3.12 External Power Connector (CN7) The WAFER-C400EV has an on-board external power connector CN7. You can connect power directly to the CPU board. CN7: External Power Connector DESCRIPTION GROUND GROUND +12V 3.13 ATX Power connector (CN6) CN6: ATX Power connector...
  • Page 21: Pc/104 Connection Bus (J5, J6)

    3.14 PC/104 Connection Bus (J5, J6) The WAFER-C400EV PC/104 expansion bus let you attach any kind of PC/104 modules. The PC/104 bus has already become the industrial embedded PC bus standard, so you can easily install over thousands of PC/104 modules from hundreds of vendors in the world.
  • Page 22: 4-Bit Gpio Connector (Cn1)

    J6: PC/104-40 Connector DESCRIPTION DESCRIPTION MCS16# SBHE# IOCS16# LA23 IRQ10 LA22 IRQ11 LA21 IRQ12 LA20 IRQ15 LA19 IRQ14 LA18 DACK0# LA17 DRQ0 MEMR# DACK5# MEMW# DRQ5 DACK6# DRQ6 SD10 DACK7# SD11 DRQ7 SD12 SD13 MASTER# SD14 SD15 3.15 4-BIT GPIO Connector (CN1) CN1: 4 BIT GPIO Connector DESCRIPTION DESCRIPTION...
  • Page 23: Audio Connector (Cn2)

    3.17 Audio Connector (CN2) DESCRIPTION DESCRIPTION Speaker out R Speaker out L Line out L Line out R Line in L Line in R MIC in...
  • Page 24: Chapter 4 Ami Bios Setup

    Chapter 4 AMI BIOS Setup Introduction This chapter discusses AMI's setup program built into the ROM BIOS. The setup program allows users to modify the basic system configuration. This special information is then stored in battery-backed RAM so that it retains the setup information when the power is turned off.
  • Page 25: Using Setup

    Using Setup In general, use the arrow keys to highlight options, press <Enter> to select, use the PageUp and PageDown keys to change entries, press <F1> for help and press <Esc> to quit. The following table provides more detail about how to navigate in the Setup program.
  • Page 26: Main Menu

    Main Menu Once you enter the AMIBIOS™ CMOS Setup Utility, the Main Menu will appear on the screen. The Main Menu allows you to select from several setup functions and two exit choices. Use the arrow keys to select among the option and press <Enter>...
  • Page 27 Auto-detect Hard Disks Use this menu to specify your settings for hard disks control. Change Supervisor Password Use this menu to set User and Supervisor Passwords. Auto Configuration with Optimal Settings Use this menu to load the BIOS factory settings for optimal system performance.
  • Page 28: Standard Cmos Setup

    Standard CMOS Setup The options in Standard CMOS Setup Menu are divided into 10 categories. Each category includes none, one or more than one setup options. Use the arrow keys to highlight the option and then use the <PgUp> or <PgDn> keys to select the value you want for each option.
  • Page 29: Advanced Cmos Setup

    Advanced CMOS Setup This section allows you to configure your system for basic operation. You have the opportunity to select the system’s default speed, boot-up sequence, keyboard operation, shadowing and security. Quick Boot When this option is set to enable, DRAM testing function will be disable. 1st /2nd /3rd Boot Device This option sets the type of device for the first boot drives that the AMIBIOS attempts to boot from after AMIBIOS POST completes.
  • Page 30 Boot Up Num-Lock If the user wants the Num-Lock function to be turned on during the boot-up period so that the user can use the key pad on the keyboard right after the system starts, please select ON to do so. Otherwise, select OFF. Floppy Drive Swap This setting decides whether drives A: and B: can be swapped or not.
  • Page 31 CPU MicroCode Update When setting Enable, Bios will load CPU Microcode. L1 Cache The setting enabled or disabled the L1 cache memory in the processor. L2 Cache The setting enables L2 cache memory. If Enabled is selected, L2 cache memory is enabled. If disabled is select, L2 cache memory is disabled. System BIOS Cacheable When this setting is set to enabled, the System ROM area from F0000-FFFFF is copied (shadowed) to RAM for faster execution.
  • Page 32 D400, 16k Shadow These settings enable shadowing of the contents of the ROM area named in the setting title. The options are Enable, Disable, and Cached. The ROM area that is not used by ISA adapter cards will be allocated to PCI adapter cards.000, 16k Shadow.
  • Page 33: Advanced Chipset Setup

    Advanced Chipset Setup This section allows you to configure the system based on the specific features of the installed chipset. This chipset manages bus speeds and access to system memory resources, such as DRAM and the external cache. It also coordinates communications between the conventional ISA bus and the PCI bus.
  • Page 34: Power Management Setup

    Power Management Setup ACPI Aware O/S This feature is the switch of ACPI function. Configuration options : [No] [Yes] ACPI Standby State This feature is the switch of STR (S3) or POS (S1) function. Configuration options: [S3/STR] [S1/POS] Re-Call VGA BIOS at S3 Resuming Enable or Disable system load the VGA bios after S3 state.
  • Page 35 Resume on Ring/LAN Allows the user to decide to resume the system from Soft Off state by either LAN or Modem Ring. Resume On RTC Alarm When this setting is enabled, the system will wakeup from soft off mode according to the time you set. Power Type Select This setting allows the user to choose the power type for AT or ATX.
  • Page 36: 4.10 Pci / Plug And Play Setup

    4.10 PCI / Plug and Play Setup Plug and Play Aware O/S If enabled, BIOS will configure only PnP ISA boot devices(i.e. all PnP ISA cards which has boot flag set). And PnP aware OS will configure all other devices. If disabled, BIOS will configure all devices. Clear NVRAM When set to Yes, system can clear NVRAM automatically.
  • Page 37 LCD Panel Type This setting is to choose LCD Panel Type Allocate IRQ to PCI VGA Choose Yes to allocate an IRQ to the VGA device on the PCI bus. The other option is No. PCI Slot1 / Slot2 / Slot3 / Slot4 IRQ Priority The setting specifies the IRQ priority for PCI device installed in the PCI expansion slot.
  • Page 38: 4.11 Peripheral Setup

    4.11 Peripheral Setup The Peripheral Setup allows the user to configure the system to the most effectively power saving mode while operating in a consistent manner with your own style of computer use. Onboard FDC Onboard Serial Port 1/Port 2 This setting specifies the base I/O port address of serial port 1.The option are Auto (AMIBIOS automatically determines the correct base I/O port address) , Disabled, 3F8h, 2F8h, 2E8h, or 3E8h.
  • Page 39: 4.12 Hardware Monitor Setup

    EPP Version EPP data or address read cycle 1.9 or 1.7 Parallel Port IRQ This setting specifies the IRQ used by the parallel port. The options are Auto, (IRQ)5, (IRQ)7. Parallel Port DMA Channel This setting is available only if the setting for the Parallel Port Mode option is ECP.
  • Page 40: 4.13 Change Supervisor Password

    4.13 Change Supervisor Password You can set passwords for either supervisor or user password, or for both of them. The differences between them are: Supervisor Password: It’s used to enter and change the settings of the setup menus. User Password: It’s used to only access the setup menus, but can’t change anything of it.
  • Page 41: Appendix A Watchdog Timer

    Appendix A Watchdog Timer The Watchdog Timer is a device to ensure that standalone systems can always recover from catastrophic conditions that cause the CPU to crash. This condition may have occurred by external EMI or a software bug. When the CPU stops working normally, hardware on the board will perform hardware reset (cold boot) to bring the system back to a known state.
  • Page 42 Example Assembly Program: TIMER_PORT = 443H TIMER_START = 443H TIMER_STOP = 843H ;;INITIAL TIME PERIOD COUNTER MOV DX, TIME_PORT MOV AL,8: ;;8 SECONDS OUT DX,AL ;;ADD YOUR APPLICATION HERE MOV DX, TIMER_START IN AL, DX. ;;START COUNTER ;ADD YOUR APPLICATION HERE W_LOOP: MOV DX, TIMER_STOP IN AL, DX...
  • Page 43: Appendix B Digital I/O

    That’s why we design 4-bit digital inputs and 4-bit digital outputs on the WAFER-C400EV. Digital Input and Output, generally, are control signals. You can use these signals to control external devices that needs On/Off circuit or TTL devices.
  • Page 44: Appendix C I/O Address Map

    Appendix C I/O Address Map C.1 System I/O Address Map I/O ADDRESS MAP DESCRIPTION 000-00F DMA controller #1 020-021 Interrupt controller # 1, master 022-023 Chipset address 040-043 System timer 060-060 Standard 101/102 keyboard controller 061-061 System speaker 064-064 Standard 101/102 keyboard controller 070-07F Real time clock, NMI controller 080-0BF...
  • Page 45 C.3 Interrupt Assignments INTERRUPT # INTERRUPT SOURCE Parity error detected IRQ 0 System timer IRQ 1 Keyboard IRQ 2 Interrupt from controller 2 (cascade) IRQ 3 Serial communication port 2 IRQ 4 Serial communication port 1 IRQ 5 Available IRQ 6 Standard floppy disk controller IRQ 7 Parallel port (print port)

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