Samsung MAX-805 Service Manual page 60

9-6 Digital Signal Processor(KS9286) : NIC9286
Port
No.
1 AVDD1
2 DPDO
3 DPFIN
4 DPFOUT
5 CNTVOL
6 AVSS1
7 DATX
8 XIN
9 XOUT
10 WDCHO
11 LRCHO
12 ADATAO
13 DVSS1
14 BCKO
15 C2PO
16 VREFL2
17 VREFL1
18 AVDD2
19 RCHOUT
20 LCHOUT
21 AVSS2
22 VREFH1
23 VREFH2
24 EMPH
25 LKFS
26 S0S1
27 RESET
28 /ESP
29 SQCK
30 SQDT
31 SQOK
32 SBCK
33 SDAT
34 DVDD1
35 MUTE
36 MLT
37 MDAT
38 MCK
39 DB8
40 DB7
Samsung Electronics
Port
- Analog VCC1
O Charge pump output for Digital PLL
I Filter input for Digital PLL
O Filter output for Digital PLL
I VCO control voltage for Digital PLL
- Analog Ground1
O Digital Audio output data
I X'tal oscillator input
O X'tal oscillator output
O Word clock output of 48 bit/Slot (88.2KHz)
O Channel clock output of 48 bit/Slot (44.1KHz), 88.2KHz when ESP ON
O Serial audio data output of 48 bit/Slot (MSB first), double speed output
when ESP ON
- Digital Ground1
O Audio data bit clock output of 48 bit/Slot(2.1168MHz), 4.2336MHz when
ESP ON
O C2 Pointer for output audio data
I Input terminal2 of reference voltage "L"(Floating)
I Input terminal2 of reference voltage "L"(GND connection)
- Analog VCC2
O Right-Channel audio output through D/A converter
O Left-Channel audio output through D/A converter
- Analog ground2
I Input terminal1 of reference voltage "H" (VDD connection)
I Input terminal2 of reference voltage "H" (Floating)
O Emphasis/Non-Emphasis output, H: Emphasis ON, L: Emphasis OFF
O The Lock Status output of frame sync
O Output of subcode sync signal(S0+S1)
I System reset at "L"
I ESP function ON/OFF control("L": ESP function ON, "H": ESP function
OFF)
I Clock for output Subcode-Q data
O Serial output of Subcode-Q data
O The CRC (Cycle Redundancy Check) check result signal output of
Subcode-Q)
I Clock for output subcode data
O Subcode serial data output
- Digital VDD1
I Mute control input ("H": Mute ON)
I Latch Signal input from Micom (Schmit Trigger)
I Latch Signal input from Micom (Schmit Trigger)
I Latch Signal input from Micom (Schmit Trigger)
I/O SRAM data I/O port8 (MSB)
I/O SRAM data I/O port7
Description
Block Diagrams
9-13