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Philips TDA9964 Specifications

12-bit, 3.0 v, 30 msps analog-to-digital interface for ccd cameras
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1. Description

2. Features

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3. Applications

TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD
cameras
Rev. 03 — 16 January 2001
The TDA9964 is a 12-bit analog-to-digital interface for CCD cameras. The device
includes a correlated double sampling circuit, PGA, clamp loops and a low-power
12-bit ADC together with its reference voltage regulator.
The PGA gain and the ADC input clamp level are controlled via the serial interface.
An additional DAC is provided for additional system controls; its output voltage range
is 1.0 V p-p, which is available at pin OFDOUT.
Correlated Double Sampling (CDS), Programmable Gain Amplifier (PGA), 12-bit
Analog-to-Digital Converter (ADC) and reference regulator included
Fully programmable via a 3-wire serial interface
Sampling frequency up to 30 MHz
PGA gain range of 24 dB (in steps of 0.1 dB)
Low power consumption of only 175 mW at 2.7 V
Power consumption in standby mode of 4.5 mW (typ.)
3.0 V operation and 2.5 to 3.6 V operation for the digital outputs
All digital inputs accept 5 V signals
Active control pulses polarity selectable via serial interface
8-bit DAC included for analog settings
TTL compatible inputs, CMOS compatible outputs.
Low-power, low-voltage CCD camera systems.
Objective specification

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Summary of Contents for Philips TDA9964

  • Page 1: Description

    Rev. 03 — 16 January 2001 1. Description The TDA9964 is a 12-bit analog-to-digital interface for CCD cameras. The device includes a correlated double sampling circuit, PGA, clamp loops and a low-power 12-bit ADC together with its reference voltage regulator.

  • Page 2: Quick Reference Data

    PGA gain = 0 dB; see Figure 8 gain = 24 dB = 3 V = 2.7 V Rev. 03 — 16 January 2001 TDA9964 Unit bits Version 1.4 mm SOT313-2 © Philips Electronics N.V. 2001. All rights reserved. 2 of 23...

  • Page 3: Block Diagram

    DOUBLE SAMPLING SHIFT CLAMP V ref V CCA3 AGND3 OFD DAC OFDOUT TEST AGND5 AGND4 Fig 1. Block diagram. AGND6 CLPOB CLPDM TDA9964 BLACK LEVEL SHIFT 12-bit ADC 8-BIT 7-BIT REGISTER REGISTER 8-BIT SERIAL REGISTER INTERFACE OPGA OPGAC SCLK SDATA...

  • Page 4: Pinning Information

    8-bit control DAC test mode input pin (should be connected to AGND5) analog ground 5 analog supply 3 Rev. 03 — 16 January 2001 TDA9964 FCE516 © Philips Electronics N.V. 2001. All rights reserved. 4 of 23...
  • Page 5 (LOW: outputs active; HIGH: outputs are high impedance) analog ground 6 analog supply voltage 4 standby mode control input (LOW: TDA9964 active; HIGH: TDA9964 standby) blanking control input clamp pulse input at optical black preset sample-and-hold pulse input...

  • Page 6: Limiting Values

    = 10 pF on all data outputs; input ramp response time is 800 s Rev. 03 — 16 January 2001 TDA9964 Unit +7.0 +7.0 +7.0 +0.5 +1.2 +1.2 +7.0 +150 Value Unit Unit © Philips Electronics N.V. 2001. All rights reserved. 6 of 23...
  • Page 7 1 pixel with 98.5% recovery Figure 3 Figure 3 = 30 MHz; ramp input Rev. 03 — 16 January 2001 TDA9964 Unit pixels 0.08 0.10 0.12 © Philips Electronics N.V. 2001. All rights reserved. 7 of 23...
  • Page 8 = 10 pF; V = 3.0 V = 10 pF; V = 2.7 V Rev. 03 — 16 January 2001 TDA9964 Unit +100 AGND AGND + 1.0 ppm/ C 2000 © Philips Electronics N.V. 2001. All rights reserved. 8 of 23...
  • Page 9 hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh 0.6 V t h(IN;SHP) 0.6 V t h(IN;SHD) t CLKH 2.2 V t d(SHD;CLK) DATA Fig 3. Pixel frequency timing diagram; all polarities active HIGH. t CDS(min) 2.2 V t CDS(min) 2.2 V 0.6 V 2.2 V 0.6 V 0.6 V t h(o)
  • Page 10 hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh hhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhhh 2.2 V t h(IN;SHP) 2.2 V t h(IN;SHD) 0.6 V t CLKL DATA Fig 4. Pixel frequency timing diagram; all polarities active LOW. 0.6 V t CDS(min) 2.2 V 0.6 V t CDS(min) 2.2 V 2.2 V 0.6 V t d(SHD;CLK) t h(o)
  • Page 11 DAC voltage output OFDOUT control DAC input code CLPOB WINDOW OPTICAL BLACK HORIZONTAL FLYBACK BLK window Rev. 03 — 16 January 2001 TDA9964 FCE519 CLPDM WINDOW DUMMY VIDEO FCE520 © Philips Electronics N.V. 2001. All rights reserved. 11 of 23...
  • Page 12 12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras TOTAL gain (dB) N tot(rms) (LSB) Rev. 03 — 16 January 2001 TDA9964 FCE521 25.9 PGA input code FCE522 PGA code © Philips Electronics N.V. 2001. All rights reserved. 12 of 23...
  • Page 13 SD10 SD11 = 10 ns (min.) Rev. 03 — 16 January 2001 TDA9964 LATCH SELECTION VSYNC FCE523 t su3 t hd3 FCE524 © Philips Electronics N.V. 2001. All rights reserved. 13 of 23...
  • Page 14 0 = rising; 1 = falling 1.5 mA 65 mA 65 mA 1.5 mA ADC digital outputs D11 to D0 active, binary high impedance high impedance active binary (typ.) 1.5 mA 65 mA © Philips Electronics N.V. 2001. All rights reserved. (typ.) 14 of 23...

  • Page 15: Application Information

    V CCD V CCD V CCA V CCO 100 nF 100 nF 100 nF 100 nF V CCD V CCO FCE525 and t (see Section 10 h(IN;SHP) h(IN;SHD) © Philips Electronics N.V. 2001. All rights reserved. 15 of 23...

  • Page 16: Power And Grounding Recommendations

    9397 750 07918 Objective specification 12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras Rev. 03 — 16 January 2001 TDA9964 © Philips Electronics N.V. 2001. All rights reserved. 16 of 23...

  • Page 17: Package Outline

    REFERENCES JEDEC EIAJ MS-026 Rev. 03 — 16 January 2001 TDA9964 SOT313-2 (A ) detail X 0.75 0.95 0.95 0.12 0.45 0.55 0.55 EUROPEAN ISSUE DATE PROJECTION 99-12-27 00-01-19 © Philips Electronics N.V. 2001. All rights reserved. 17 of 23...

  • Page 18: Handling Information

    12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras parallel to the transport direction of the printed-circuit board; transport direction of the printed-circuit board. Rev. 03 — 16 January 2001 TDA9964 © Philips Electronics N.V. 2001. All rights reserved. 18 of 23...

  • Page 19: Manual Soldering

    , SO, SOJ Rev. 03 — 16 January 2001 TDA9964 Soldering method Wave Reflow not suitable suitable not suitable suitable suitable suitable [3] [4] not recommended suitable not recommended suitable © Philips Electronics N.V. 2001. All rights reserved. 19 of 23...

  • Page 20: Revision History

    Objective specification; second version 20000502 Objective specification; initial version 9397 750 07918 Objective specification 12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras Rev. 03 — 16 January 2001 TDA9964 © Philips Electronics N.V. 2001. All rights reserved. 20 of 23...

  • Page 21: Data Sheet Status

    Preliminary specification Qualification This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
  • Page 22 Malaysia: Tel. +60 37 50 5214, Fax. +60 37 57 4880 Mexico: Tel. +9-5 800 234 7381 Middle East: see Italy For all other countries apply to: Philips Semiconductors, Marketing Communications, Building BE, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 272 4825 9397 750 07918 Objective specification...

  • Page 23: Table Of Contents

    Disclaimers......21 © Philips Electronics N.V. 2001. All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

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