LG KE800 Service Manual page 16

3. TECHNICAL BRIEF
The GMSK transmitter supports power class 4 for GSM850 and GSM900 as well as power class 1 for
DCS1800 and PCS1900. The digital transmitter architecture is based on a very low power fractional-N
Sigma-Delta synthesizer without any external components (see Figure 3-3). The analog I/Q modulation data
from the baseband is converted to digital, filtered and transformed to polar coordinates. The
phase/frequency signal is further on processed by the Sigma-Delta modulation loop. The output of its
associated VCO is divided by four or two, respectively, and connected via an output buffer to the
appropriate single ended output pin. This configuration ensures minimum noise level.
The 8PSK transmitter supports power class E2 for GSM850 and GSM900 as well as for DCS1800 and
PCS1900. The digital transmitter architecture is based on a polar modulation architecture, where the analog
modulation data (rectangular I/Q coordinates) is converted to digital data stream and is subsequently
transformed to polar coordinates by means of a CORDIC algorithm. The resulting amplitude information is
fed into a digital multiplier for power ramping and level control. The ready processed amplitude signal is
applied to a DAC followed by a low pass filter which reconstructs the analog amplitude information. The
phase signal from the CORDIC is applied to the Sigma-Delta fractional-N modulation loop. The divided
output of its associated VCO is fed to a highly linear amplitude modulator, recombining amplitude and phase
information. The output of the amplitude modulator is connected to a single ended output RF PGA for
digitally setting the wanted transmit power.
The PA interface of SMARTiPM supports direct control of standard dual mode power amplifiers (PA's) which
usually have a power control input VAPC and an optional bias control pin VBIAS for efficiency
enhancement. In GMSK mode, the PA is in saturated high efficiency mode and is controlled via its VAPC
pin directly by the baseband ramping DAC. In this way both up- / down-ramping and output power level are
set. In 8PSK mode, the ramping functionality is assured by an on-chip ramping generator, whereas output
power is controlled by the PGA's as described above.
(3) RF-Synthesizer
The SMARTiPM contains a fractional-N sigma-delta synthesizer for the frequency synthesis in the RX
operation mode. For TX operation mode the fractional-N sigma-delta synthesizer is used as Sigma-Delta
modulation loop to process the phase/frequency signal. The 26MHz reference signal is provided by the
internal crystal oscillator. This frequency serves as comparison frequency of the phase detector and as
clock frequency for all digital circuitry.The divider in the feedback path of the synthesizer is carried out as a
multi-modulus divider (MMD). The loop filter is fully integrated and the loop bandwidth is about 100 kHz to
allow the transfer of the phase modulation. The loop bandwidth is automatically adjusted prior to each slot
(OLGA 2 ). To overcome the statistical spread of the loopfilter element values an automatic loopfilter
adjustment (ALFA) is performed before each synthesizer startup.The fully integrated quad-band VCO is
designed for the four GSM bands (850, 900, 1800, 1900 MHz) and operates at double or four times transmit
or receive frequency. To cover the wide frequency range the VCO is automatically aligned by a binary
automatic band selection (BABS) before each synthesizer startup.
(4) DCXO
The SMARTiPM contains a fully integrated 26MHz digitally controlled crystal oscillator (DCXO) with three
outputs for the system clock, one output for the GSM baseband and two additional for other subsystems
(GPS, Bluetooth, etc.). The only external part of the oscillator is the crystal itself.The frequency tuning is
performed along the selected subrange by programming the frequency control word (XO_TUNE) via the
three wire bus ("3Wbus").
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