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Pin list
2.6.2. Pin Description (Continued)
Table 6: System pins
Pin
A
CLK27MA
CLKSPEEDSEL
a
AUXCLKOUT
B
NOT_RESET
NOT_WDOGRSTOUT
a. 5 V tolerant
b. 1.8 V tolerant
Table 7: JTAG pins
Pin
A
TDI
a
TMS
a
TCK
a
NOT_TRST
a
TDO
a. 5 V tolerant
Table 8: DCU pins
Pin
DCUTRIGGERIN
DCUTRIGGEROUT
a. 5 V tolerant
30/709
STMicroelectronics Confidential
Location
A18
C16
a
D17
AE7
a
AF8
Location
AC7
AD7
AF7
AE6
AF6
Location
P1
a
R3
A
I/O
Function
I
Selectable input clock to PLL or for x1 mode
I
PLL speed select
O
Auxiliary clock for general use
I
System reset
O
Internal watchdog timer reset.
I/O
Function
I
Boundary scan test data input
I
Boundary scan test mode select
I
Boundary scan test clock
I
Boundary scan test logic reset
O
Boundary scan test data output
I/O
Function
I
External trigger input to DCU
O
Signal to trigger external debug circuitry
89
7368868E
LC-26GA5E
LC-32GD9E
LC-32GA5E
LC-37GD9E
STi5516
Pad
type
C4
C4
C4
-
C4
Pad
type
C4
C4
-
C4
C4
Pad
type
C4
C4
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