LG -L25 Service Manual page 120

<4-1-3-2_PMIC_PM8926_POWER>
CCDS CARD Information
Release Date 2013.08.17
Based on Reference Schematic Rev.BA
80-NE925-41 MSM8926 BASEBAND PRELIMINARY REFERENCE SCHEMATIC_BA
EXT_OVP_CTRL
VBUS_USB_IN
+5V0_VREG_BHARGER
+5V0_VREG_BHARGER
+VPWR
C4143
10u
20140531
Critical : Layout
CHG_PGND
VBAT
Note 2 VBAT_SENSE
If BMS_CSP and BMS_CSN pins are not used,
+VPWR
please connect them to VPH_PWR.
VBAT_SENSE_P
1'st : Use internal sensing Resistor
VBAT_SENSE_N
VCOIN
+5V0_VREG_BHARGER
+VPWR
+VPWR
Note 9
R4145
+2V075_VREG_L25 +2V1_VSW_S4
0
L25 helper to S4
Current Assist when VBAT drops below 3V
3000mA
3000mA
2000mA
2000mA
2000mA
1200mA
1200mA
1200mA
300mA
300mA
600mA
150mA
50mA
600mA
50mA
LGE Internal Use Only
Note 1
External OVP FET for over 1A charging
Q4100
6 D1_1 S1 1
8 D1_2
Rev.B
5 G2 G1 2
D2_2 7
4 S2 D2_1 3
Rev.B
161
USB_IN_1
172
USB_IN_2
20140523
171
C4131 10n
OVP_CP_DRV
162
OVP_OUT
C4132 0.1u 167
VDRV_P
143
VCHG_1
155
VCHG_2
L4133
1 2
154
VSW_CHG_1
1u 166
Rev.B VSW_CHG_2
152
VPH_PWR_1
164
VPH_PWR_2
140
BATFET_CP_DRV
139
VBAT_1
151
VBAT_2
C4145 100n 163
VBAT_3
156
VBAT_SNS
131
C4146 470n
BMS_BYP
107
BMS_CSP
96
BMS_CSN
76
VCOIN
Note 1
104
VDD_FLASH
+1V35_PM_GR1_2
4
+1V35_VSW_S3 VDD_GR1
1
VDD_GR2_1
11
VDD_GR2_2
+2V1_PM_GR3 115
+2V1_VSW_S4 VDD_GR3
+2V1_PM_GR4
27
+2V1_VSW_S4 VDD_GR4
59
VDD_GR5_1
+VPWR
60
VDD_GR5_2
7
+VPWR VDD_GR6
Note 3 41
VDD_GR7
48
If you don't use bypass Boost, Connect +VPWR VDD_L25
121
AVDD_BYP
170
VPRE_BYP
9
VDD_S1_1
Note 4 10
VDD_S1_2
GR1 : L1, L2, L4, L5
22
GND_S1_1
33
GR2 : L3, L24, L26
GND_S1_2
34
GR3 : L6, L7, L8, L9, L27 VDD_S2
57
GND_S2_1
GR4 : L10, L11, L13
67
GND_S2_2
GR5 : L14, L12 68
GND_S2_3
GR6 : L15, L16, L17, L18 47
VDD_S3
23
GR7 : L19, L20, L21, L22, L23, L28 GND_S3
93
VDD_S4
69
GND_S4
126
VDD_WLED
113
GND_WLEDI_1
114
Current Sensing Point for WLED Driver GND_WLEDI_2
79
VDD_S5
92
GND_S5
Note 5 Place input caps close to respective VIN pins.
Each capacitor GND should be star routed to their respective reference ground
(GND_S1, GND_S2, GND_S3, GND_S4)
Then input caps should via directly to main ground
8 L4130 240n
VSW_S1_1
21
VSW_S1_2
Rev.1.0 Remote Sense
20
R4132 0
VREG_S1
45 L4131 240n
VSW_S2_1
46
VSW_S2_2
58
VSW_S2_3 Rev.1.0 Remote Sense
56 R4133 0
VREG_S2
35
L4132 1u
VSW_S3
36
VREG_S3
81 L4134 2.2u
VSW_S4
95
VREG_S4
80
L4135 1u
VSW_S5
78 THMC Type
VREG_S5
Note 9
QMC change Vlaue due to match switching frequency setting.
80-NE925-700_MSM8926-MSM8928_CHIPSET_ANNOUNCEMENT, 1/3
updated in reference schemaic 80-NE925-41 rev. DA
15
VREG_L1
3
VREG_L2
2
VREG_L3
37
VREG_L4
25
VREG_L5
105
VREG_L6_1
106
VREG_L6_2
116
U4100 VREG_L7
118
VREG_L8
128
VREG_L9
PM8926 38
VREG_L10
16
VREG_L11
71
VREG_L12
14
VREG_L13 PMIC Internal Use for VREG_RF_CLK
49
VREG_L14
43
VREG_L15
19
VREG_L16
18
VREG_L17_1
30
VREG_L17_2
32
VREG_L18
29
VREG_L19
55
VREG_L20
53
VREG_L21
52
VREG_L22
51
VREG_L23
12
VREG_L24
Note 7
70
VREG_L25
24
Reserved for future 1200mA, Source S3
VREG_L26
127
VREG_L27
Reserved for future 600mA, Source S4
50
VREG_L28
Reserved for USIM3 150mA
94
VOUT_LVS1
138
VSW_WLED
137
OVP_WLED
125
WLED_1
103
VLED_FLASH
CHG_PGND
<9-8-3_Flash_LED>
Rev_0.3
FLASH_LED_OUT_P
1 LD9830
ZD9830
2
EAV62175401
EAT62053101
- 120 -
PCB REVISION
Rev R4130 R4131
R4130 100K
PCB_REVISION +1V8_VREG_L12
A 100K
TOL=0.01
B 100K
HW - Rev.1.0
C 100K
SW - Rev.1.0
D 100K
E 100K
F
100K
G 100K
1.0 100K
1.1 DNI
BACKUP BATT
+1V15_VSW_S1
+1V15_VSW_S2
10uAH / 0.03F
+1V35_VSW_S3
BAT4130
+2V1_VSW_S4
VCOIN
+1V15_VSW_S5
Note 8
Output capacitor should be placed close to MSM load EAE63087501·Î ÃßÈÄ °ËÅä,5/15ÀϱîÁö
ground cap directly to main ground using separate via.
Main ground should be continuous (not fragmented) plane
between output capacitor and the PMIC
1.2A : MSM_A1 , WTR_RF1
+1V225_VREG_L1
1.2A : MSM_P1, DDR_CORE_1P2
+1V2_VREG_L2
1.2A : MSM_MEM (EBI0_CDC, TXADC)
+1V15_VREG_L3
300mA : MSM_MIPI , CODEC_CORE
+1V2_VREG_L4
300mA : FT_CAM_DVDD 1.2V
+1V2_VREG_L5
600mA : MSM_P3 , P4 , P7 , P8 , IO , etc
+1V8_VREG_L6
+1V9_VREG_L7 150mA : MSM_A2
50mA : MIPI_DSI, PLL2
+1V8_VREG_L8
+2V05_VREG_L9 600mA : WTR_RF2
50mA : WTR_RF_IO , MSM_USB_1P8, WCN XO
+1V8_VREG_L10
PMIC Internal Use for VREG_L6 Note 6
5mA : PM_ADC
+1V8_VREG_L12
50mA : RF_SW, GPS_LNA, FEM
+2V75_VREG_L14
+2V8_VREG_L15 300mA : FT_CAM AVDD
600mA : WCN3660 RF 3.3V
+3V0_VREG_L16
+2V95_VREG_L17 600mA : eMMC_VCC
600mA : SD_VCC
+2V95_VREG_L18
300mA : SENSOR_VDD
+2V85_VREG_L19
50mA : MSM_USB_3P3
+3V075_VREG_L20
50mA : MSM_P2
+2V95_VREG_L21
150mA : USIM1
+2V95_VREG_L22
150mA 8M_CAM_VCM_Test
+3V0_VREG_L23
1.2A : WCN_RF
+1V3_VREG_L24
+2V075_VREG_L25 600mA : +2V075_PM_BHELPER
1.2A : 8M_DVDD
+1V2_VREG_L26
+1V8_VREG_L27 600mA : FT_CAM IOVDD
150mA : TOUCH_VDD
+3V1_VREG_L28
300mA : SENSOR_IO , +1V8_SENSOR_VDD
+1V8_VREG_LVS1
L4136 10u
+VPWR
Up to 10EA of LED
PMIC_LED_A
ZD4130
PMIC_LED_C
FLASH_LED_OUT_P
C4163
4.7u
Copyright © 2014 LG Electronics. Inc. All right reserved.
6. CIRCUIT DIAGRAM
20K 0.300
27K 0.383
39K 0.505
51K 0.680
75K 0.771
100K 0.900
130K 1.017
DNI 1.800
100K 0.000
Rev.A Change
Rev.A Change
Rev.A Change
Rev.A Change
Only for training and service purposes