JVC LT-Z32SX4B Service Manual page 8

2.3.2 MAIN CPU PIN FUNCTION [IC7501 : DIGITAL SIGNAL PWB ASS'Y]
Pin Pin name I/O
1 TCK I Test purpose
2 TMS I Test purpose
3 TDI I Test purpose
4 TDO O Test purpose
5 P2.8 O Not used
6 P2.9 O Blue for OSD
7 P2.10 O Blue for OSD
8 P2.11 O Blue for OSD
9 P2.12 O Blue for OSD
10 P2.13 O Blue for OSD
11 P2.14 I Not used
12 P2.15 O Request for chassis CPU communication
13 VSS33 - GND
14 VDD33 I 3.3V
15 P4.5 O Not used
16 A20 O Program ROM address for main CPU
17 A19 O Program ROM address for main CPU
18 A18 O Program ROM address for main CPU
19 A17 O Program ROM address for main CPU
20 VSS25 - GND
21 VDD25 I 2.5V
22 A16 O Program ROM address for main CPU
23 A8 O Program ROM address for main CPU
24 A7 O Program ROM address for main CPU
25 A9 O Program ROM address for main CPU
26 A6 O Program ROM address for main CPU
27 A5 O Program ROM address for main CPU
28 A10 O Program ROM address for main CPU
29 A11 O Program ROM address for main CPU
30 A12 O Program ROM address for main CPU
31 VSS33 - GND
32 VDD33 I 3.3V
33 A4 O Program ROM address for main CPU
34 A3 O Program ROM address for main CPU
35 A2 O Program ROM address for main CPU
36 A1 O Program ROM address for main CPU
37 A0 O Program ROM address for main CPU
38 A13 O Program ROM address for main CPU
39 ARAS/A14 O Program ROM address for main CPU
40 CAS/A15 O Program ROM address for main CPU
41 VSS33 - GND
42 VDD33 I 3.3V
43 MEMCLK O Clock for memory
44 CSSDRAM O Chip select for memory
45 CLKEN O Clock enable for memory
46 CSROM O Chip select for memory
47 RD O Read for memory
48 UDQM O Control buffer of memory
49 LDQM O Control buffer of memory
50 WR O Write for memory
51 D15 I/O Program ROM data for main CPU
52 VSS33 - GND
53 VDD33 I 3.3V
54 D7 I/O Program ROM data for main CPU
55 D0 I/O Program ROM data for main CPU
56 D14 I/O Program ROM data for main CPU
57 D8 I/O Program ROM data for main CPU
58 D6 I/O Program ROM data for main CPU
59 D1 I/O Program ROM data for main CPU
60 VSS33 - GND
61 VDD33 I 3.3V
62 D13 I/O Program ROM data for main CPU
63 D9 I/O Program ROM data for main CPU
64 D5 I/O Program ROM data for main CPU
1-8 (No.YA209)
Function Pin
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
Pin name I/O
65 D2 I/O Program ROM data for main CPU
66 D12 I/O Program ROM data for main CPU
67 D10 I/O Program ROM data for main CPU
68 VSS33 - GND
69 VDD33 I 3.3V
70 D4 I/O Program ROM data for main CPU
71 D3 I/O Program ROM data for main CPU
72 D11 I/O Program ROM data for main CPU
73 RSTIN I Reset
74 POWER O Sleep state release for chassis CPU [Relese : L]
75 P3.1 O Not used
76 REMOCON I Remote control
77 P3.3 I Clock for OSD
78 P3.4 O Red for OSD
79 P3.5 O Red for OSD
80 P3.6 O Red for OSD
81 P3.7 O Red for OSD
82 MTST O Data transmission for chassis CPU communication
83 MTSR I Data receive for chassis CPU communication
84 VSS33 - GND
85 VDD33 I 3.3V
86 VSS25 - GND
87 VDD25 I 2.5V
88 TXD0 O Communication for adjustment
89 RXD0 O Communication for adjustment
90 P3.12 O Red for OSD
91 CLK O Clock for chassis CPU communication
92 P3.15 O Green for OSD
93 P5.14 O Green for OSD
94 P5.15 O Green for OSD
95 TRIG_IN O Green for OSD
96 TRIG_OUT O Green for OSD
97 P6.2 O Green for OSD
2
98 P6.3 O I C bus clock (for main memory)
2
99 P6.4 I/O I C bus Data (for main memory)
P6.5 O Teletext signal select [Analog RGB : H / Digital RGB : L]
IRQ O Not used
VSYNC I Vertical sync
HSYNC I Horizontal sync
COR/RSTOUT O Not used
BLANK O Ys for OSD / Teletext
VDD33 I 3.3V
VSS33 - GND
XTAL1 I 6MHz for system clock
XTAL2 O 6MHz for system clock
VSSA - GND
VDDA I 2.5V
R O R for OSD / Teletext
G O G for OSD / Teletext
B O B for OSD / Teletext
VSSA - GND
VDDA I 2.5V
CVBS2 I Video for Teletext
VSSA - GND
VDDA I 2.5V
CVBS1B I Video for Teletext
CVBS1A I Video for Teletext
VSSA - GND
VDDA I 2.5V
KEY1 I Key scan data 1 [ON : H]
KEY2 I Key scan data 2 [ON : H]
MECA_SW I Main power ON / OFF control [ON : L]
P5.3 I Not used
TMODE I Test purpose
Function