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Pin
Signal
In/Out
Description
(standby =power
off)
No.
name
48
VB
In
LCD power supply. High during
standby
and
VB when
clock
stops.
49
VDIS
In
LCD
power
supply.
High during
standby and
low when
clock stops.
50
VCC
In
LCD
power
supply.
Normally,
low.
51
voe
Out
LCD
power
supply. High
during
standby and
low when
clock stops.
52
VGG
In
Power
supply.
Normally,
l
o
w
level.
53
07
In/Out
Data
bus
line.
Normally, high
impedance.
.j.
.j.
-
60
DO
In/Out
Data bus line.
Normally,
high
impedance.
61
F05
Out
32KB ROM1 chip select
enable signal.
A low
on this line selects the
ROM1.
62
F04
Out
SD through
the SIO which is a
transmit
data. Low
during standby
(buffered with
the
50H001
).
63
F03
Out
Data. Transmission of serial
data to
the
PCU.
64
F02
Out
WAKE UP
which
is
a
PCU
start
request
signal.
The PCU wakes up
which a high
state
of
this
signal.
65
F01
Out
Application ROM2 chip select
enable
signal. A low on this line selects
the
ROM2.
66
B08
but
RAM, DIS-LSI enable
signal.
67
A14
Out
Address
bus.
High during standby.
.j.
.j.
-
80
A1
Out
Address bus. High during
standby.
-4-
Pin
Signal
In/Out
Description
(standby=
power off)
No.
name
1
AO
Out
Address bus, low during standby
2
R/W
Out
Write
clock,
normally high
3
CPAL
Out
Low order
bit
address latch signal.
As the address signal
is
carried out
the
data bus
when
a large capacity ROM
is used, that address
signal
(low order
8
bits of
16
bits) is latched with
this
signal.
4
TEST
In
Test pin, normally
low.
5
(/) 1
In
Oscillator circuit input
6
(/JO
Out
Oscillator circuit
output
7
RESET
In
Reset
input.
A high on this line causes
to
reset.
The signal is normally pulled
down
to low level.
8
XLN
In
Input
from the data recorder option
(EAR jack)
9
KON
In
ON/BRK key
input. Normally,
pulled
down to low level.
10
XOUT
Out
Output
to the data
recorder
option
(MIC jack) and
the buzzer.
11
DIS
Out
LCD
driver Control signal
12
HA
Out
LCD driver
clock.
Low during
standby.
2KHz
pulse generated
when
the dis-
play
is
operating.
13
IA8
In/Out
Key and RAM
card slot lock
switch
input.
Low
during standby. Pulse
generated when
a key
is
depressed.
14
IA7
In/Out
Key input/key
strobe output.
Low
during standby.
Pulse
generated when
a key is depressed
.
.j.
.j.
-
20
IA1
In/Out
Key input/key
strobe
output. Low
during
standby.
Pulse generated when
a key is
depressed.
21
IB8
In
Busy signal. Serial busy signal from
the
printer
control
IC (PCU).
22
IB7
In
Low battery signal
([B)
which is an
input from the low battery detect
circuit.
Normally,
high.
23
IB6
In
CD through the SIO which is a send
request from the
other
end.
Data
are
received when
the
signal is in a high
state and
stopped when low.
24
IB5
In
CS through
the
SIO which is a
trans-
mission enable from
the
other end.
Transmission
is done
when
the
signal
is in a
high
state and stopped
wheri
low.
25
IB4
In
RD through
the
SIO which is receive
data.
26
IB3
Out
RR through
the
SIO which
is a receive
ready
signal from
this side. High when
ready
to recei\1¬ and low
when
not
ready to
receive.
27
IB2
Out
RS
through the
SIO which
is
a sent
request from this
side.
High
during
data transmission
and
low when
complete.
28
IB1
Out
ER through
the SIO. Goes high
upon
execution
of the
OPEN
command.
29
VM
In
LCD
power
supply
30
VA
In
LCD power supply
31
GND
In
Power supply
32
H1
Out
LCD
back plate
signal.
High
impedance
during standby. 4-level
pulse
during
displaying
.
.j.
.j.
-
47
H16
Out
LCD back plate
signal.
High impedance
during standby. 4-level
pulse
during
displaying.
4. SIGNAL DESCRIPTIONS
4-1. CPU
(SC61860A14)
pin signal descr iption
-
PC-2500
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