Table of Contents
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Table of Contents
Summary of Contents for SunPlus CPU6502
- Page 1 CPU6502 Instruction Manual v2.1 09/13/2005 SUNPLUS TECHNOLOGY CO., LTD.
- Page 2 No responsibility is assumed by Sunplus Technology for any infringement of patent or other rights of third parties which may result from its use. In addition, Sunplus products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus.
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Page 3: Table Of Contents
AND ........................24 ASL........................25 BCC/BCS/BEQ/BMI/BNE/BPL/BVC/BVS .............26 BIT ........................27 CLC ........................28 CLD ........................28 CLI ........................28 CLR ........................28 CLV........................30 CMP........................30 CPX ........................31 CPY ........................31 DEC ........................32 DEX ........................32 DEY ........................33 EOR........................33 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... - Page 4 SBC ........................44 SEC ........................45 SED ........................45 SEI........................45 SET........................45 STA........................47 STX........................47 STY........................48 TAX........................48 TAY........................49 TST........................49 TSX........................49 TXA........................50 TXS........................50 TYA........................50 Summary of Available Instruction set for each CPU Type ...........52 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
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Page 5: Revision History
Page 25: ASL aaaa, X Modify: No. Cycle of 65n02 from 7 to 6*. Page 36: JMP(aaaa) Modify: No. Cycle of 65n02, 65r02, 65s02, Sunplus Code from 3 to 6. Page 39: LSR aaaa, X Modify: No. Cycle of 65n02 from 7 to 6*. - Page 6 Update the CPU type of IC. The X2s.,exe is updated to v2.78, 09/08/2000 V1.2 07/18/2000 Michael Lin Page 44 Origin: SBC: (A-M -C) A, C Modify to: SBC: (A-M - A, C Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
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Page 7: General Description
However, not all 6502 instructions or addressing modes are available in all SUNPLUS CPUs. To list the types of SUNPLUS CPU, please obtain a tool, named x2s.exe, and apply the following syntax in a DOS command line: C:\>x2s /s... -
Page 8: Register
Normally, SP is used for storing return address, data of status register or temporary data. Status Register (P) 8 Bit Status Register usually offers information on result of previous instruction executed. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 9: Status Register (P)
If arithmetic or logic operation results to negative, N is set to 1. otherwise, N=0. * Note: Not all instructions affect Status Register. A detailed instruction description will be discussed in later section. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 10: Stack
Now, in pop activity, the value of 60 will be popped out first. Second, the value of 50 will be popped. Then, 40 and 30 will be popped out in order. Stack is empty after all the values are popped. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 11: Stack Pointer (Sp)
$FF. Note that if stack now pops again, the stack pointer will point to location $00. This is an illegal stack activity since the bottom of stack is $FF. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 12: Addressing Mode
#01H or #$01 Example: #$08 xx AND 08 Data Memory Program Memory mmmm+2 mmmm mmmm+1 mmmm+2 Example: Given: A=7EH #88H Result: 88 AND 7E A (08H stored in A) Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 13: Absolute Addressing Mode
16 may be the address of a byte of data or the beginning address for the next instruction. Operation: OP-code Adr16 Example: $0030 xx AND yy Data Memory 0030 Program Memory mmmm+2 mmmm mmmm+1 mmmm+2 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 14: Absolute Indexed Addressing Mode
$500 + $02 Data Memory 0502 mmmm+3 The new address is $500 + $02 = $502. This operation will copy the data of $502 to Accumulator. Therefore, Accumulator contains A8. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 15: Zero Page Addressing Mode
The zero page addressing mode uses the low-order byte of the address in page zero (adr 08) to specify a memory address. Operation: OP-Code Adr 08 Example: Data Memory 0028 Copy data from location $28 to Accumulator. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 16: Zero Page Indexed Addressing Mode
Adr 08, X Example: #$20 #$77 $60, X $20 + $60 = $80 Data Memory 0060 0080 The new address = $60 + $20 = $80 Store #77H into $80. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 17: Implied Addressing Mode
Operation: OP-Code Example: ROL Rotate Left with Carry Rotate Right with Carry 5 4 3 2 6 5 4 3 2 1 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 18: Indexed Indirect Addressing Mode
Thus, the valid address must be on page zero. Operation : OP-Code (Adr 08, X) Example: ($20, X) xx AND yy Data Memory 00rr+20 00rr+21 ppqq mmmm+2 mmmm+2 mmmm+1 Program Memory Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 19: Indirect Addressing Mode
CPU6502 Instruction Manual v2.1 Indirect addressing mode Index addressing mode can only use JMP instruction. Operation: (Adr) Example: ($31FE) Data Memory 31FE 31FF PC=ppqq Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 20: Indirect Indexed Addressing Mode
Indirect Indexed addressing mode can only be applied for Y index register. Operation: Opcode (aa), Y Example: ($20), Y 0712 + 01 = 0713 Data Memory 0020 0021 0713 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 21: Relative Addressing Mode
The maximum branch forward is 127 bytes and the maximum branch backward is 128 bytes. Operation: OP-Code Adr 08 Example: M127: LDA #$20 127 Bytes M127 P128 P128 128 Bytes P128: #$30 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 22: Format Of Assembly Language Instruction
(;) should be placed at the beginning of comment. For example: LDA #00 ; load data 00 to A Counter ; load value of A into Counter Note: A space is needed between two fields. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 23: Instructions
Z: Set if result is 0 C: Set if there is a carry from the most significant bit of the result. D: * if set to 1, the ADC performs decimal operation. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 24: And
AND (aa), Y * Add 1 clock cycle if page boundary is crossed. X: Not available. N: Set if result is negative Z: Set if result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 25: Asl
X: Not available. N: Set if result is negative Z: Set if result is 0 C: Set if the bit shifted from the most significant bit is 1 . Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 26: Bcc/Bcs/Beq/Bmi/Bne/Bpl/Bvc/Bvs
** Add 1 clock cycle if branch occurs to the same page. Add 2 clock cycles if branch occurs to different page. Add 1 clock cycle if branch occurs. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 27: Bit
X: Not available. N: Set if memory bit7 of the result is 1 V: Set if memory bit 6 of the result is 1. Z: Set if result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 28: Clc
Clear Interrupt mask. (enable interrupt) Addressing Assembly 6502 Sunplus Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied I: Unconditionally cleared. Bit Clear. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... - Page 29 Zero Page CLR aa, 3 Zero Page CLR aa, 4 Zero Page CLR aa, 5 Zero Page CLR aa, 6 Zero Page CLR aa, 7 X: Not available. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
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Page 30: Clv
* Add 1 clock cycle if page boundary is crossed. X: Not available. N: Set if result is negative Z: Set if result is 0 C: Set if a “borrow” not occurred. (A > = M) Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 31: Cpx
CPY aaaa X: Not available. N: Set if result is negative Z: Set if result is 0 C: Set if a “borrow” not occurred (Y > = data) Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 32: Dec
Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied N: Set if result is negative Z: Set if result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 33: Dey
EOR (aa), Y * Add 1 clock cycle if page boundary is crossed. X: Not available. N: Set if result is negative Z: Set if result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 34: Inc
Zero Page, X INC aa, X Absolute INC aaaa Absolute, X INC aaaa, X X: Not available. N: Set if result is negative Z: Set if result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 35: Inx
Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied N: Set if result is negative Z: Set if result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 36: Iny
Jump to specified location Addressing Assembly 6502 Sunplus Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Absolute JMP aaaa Indirect JMP (aaaa) Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 37: Jsr
(Indirect), Y LDA (aa), Y * Add 1 clock cycle if page boundary is crossed. X: Not available. N: Set if result is negative Z: Set if result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 38: Ldy
Absolute, X LDY aaaa, X * Add 1 clock cycle if page boundary is crossed. X: Not available. N: Set if result is negative Z: Set if result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 39: Lsr
C: Set if the bit shifted from the least significant bit is 1. No operation Addressing Assembly 6502 Sunplus Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 40: Ora
Z: Set if result is 0 Push Accumulator on Stack Addressing Assembly 6502 Sunplus Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 41: Php
CPU12 Implied Pull Status Flag from Stack Addressing Assembly 6502 Sunplus Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 42: Rol
X: Not available. N: Set if result is negative Z: Set if result is 0 C: Set if the bit shifted from the most significant bit position is 1. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 43: Ror
Form 65b02 65n02 65r02 65s02 CPU12 Implied N: Restored from stack V: Restored from stack D, I: Restored from stack Z: Restored from stack C: Restored from stack Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 44: Sbc
Z: Set if result is 0 C: Set if there is no “borrow” occurred. (A > M). D: * if set to 1, the ADC performs decimal operation. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 45: Sec
1 (Disable Interrupt) Addressing Assembly 6502 Sunplus Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied I: Unconditionally Set Bit Set. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... - Page 46 Zero Page SET aa, 3 Zero Page SET aa, 4 Zero Page SET aa, 5 Zero Page SET aa, 6 Zero Page SET aa, 7 X: Not available. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
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Page 47: Sta
Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Zero Page STX aa Zero Page, Y STX aa, Y Absolute STX aaaa X: Not available. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 48: Sty
Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied X: Not available. N: Set if the result is negative Z: Set if the result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 49: Tay
TST aa, 4 Zero Page TST aa, 5 Zero Page TST aa, 6 Zero Page TST aa, 7 X: Not available. Z: Set if BITn of $aa is 0. Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... -
Page 50: Txa
Transfer Register X to Stack, S Addressing Assembly 6502 Sunplus Available Instruction mode Language Opcode Opcode Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied Transfer Register Y to Accumulator, A Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... - Page 51 Bytes & No. Cycles Form 65b02 65n02 65r02 65s02 CPU12 Implied X: Not available. N: Set if the result is negative Z: Set if the result is 0 Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
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Page 52: Summary Of Available Instruction Set For Each Cpu Type
√ √ ASL aa,X Zero page Indexed x √ √ ASL aaaa Absolute √ √ ASL aaaa,X Absolute Indexed x √ √ √ √ √ BCC ?? Relative Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005... - Page 53 CPX aaaa Absolute √ √ CPY #dd Immediate √ √ CPY aa Zero page √ √ CPY aaaa Absolute √ √ √ √ √ DEC aa Zero page Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
- Page 54 √ √ √ √ LDA #dd Immediate √ √ √ √ √ LDA aa Zero page √ √ √ √ √ LDA aa, X Zero page Indexed X Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
- Page 55 100. ORA #dd Immediate √ √ √ √ √ 101. ORA aa Zero page √ √ 102. ORA aa, X Zero page Indexed X √ √ 103. ORA aaaa Absolute Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
- Page 56 125. SBC aa Zero page √ √ 126. SBC aa, X Zero page Indexed X √ √ 127. SBC aaaa Absolute √ √ 128. SBC aaaa,X Absolute Indexed X Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
- Page 57 151. TST aa, BITn Zero page √ √ √ √ √ 152. TSX Implied √ √ √ √ 153. TXA Implied √ √ √ √ √ 154. TXS Implied Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
- Page 58 CPU6502 Instruction Manual v2.1 Instruction Address Mode 65b02 65n02 65r02 65s02 CPU12 √ √ 155. TYA Implied Sunplus reserves the rights to change this documentation without prior notice. 09/13/2005...
- Page 59 Click below to find more Mipaper at www.lcis.com.tw Mipaper at www.lcis.com.tw...
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