Summary of Contents for Techno-innov LPC1224
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Page 1: Reference Manual
LPC1224_BO_SRM Board v0.3 LPC1224 break-out board System Reference Manual LPC1224_BO_SRM for Board v0.3 September 10, 2015 - Doc rev 0.3b Author: Nathaël Pajani page 1 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 2: Table Of Contents
4 Electronics 4.1 Micro-controller LPC1224 ......... . - Page 3 ........... 22 page 3 / Techno-Innov - DomoTab http://www.techno-innov.fr...
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Page 4: Introduction
The LPC1224 break-out board hardware and schematics are under Creative Commons CC BY-SA 3.0 License. You can produce your own original or modified version of the LPC1224 break-out board, and use it however you like, even sell it for profit. -
Page 5: Hardware
19 pins, 2.54mm pitch header. Provides +5V from USB, ADC, and GPIO from port 0 and USB micro-AB female connector. Available only on micro USB board type. USB A male connector. Available only on USB A board type. Table 1 – Module Connectors Description page 5 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 6: P1 Connector
P1 connector provides access to +3.3V, Ground, UART0, UART1, I C, SPI, and additional GPIO pins from port 0 of the LPC micro-controller. page 6 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 7: P2 Connector
Note : Most P2 pins also provide alternate capture or match input functions for 32-bit timers. Refer to the LPC1224 documentation from NXP for full documentation of the alternate functions. Note : When the board is not connected to a power source on the USB port the +5V is not present on pin 1 of P2 connector. -
Page 8: Jumpers
It is possible to operate the board without jumpers. Then the UAS-to-UART is not connected to the micro- controller. Note : It is not mandatory for the jumpers to be on the same position on J3 and J4. page 8 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 9: Electronics
. The LPC1224 version used on the module is the LPC1224FBD48/101. All LPC1224 have an ARM Cortex-M0 core running at up to 45 MHz. The module uses the internal 12 MHz RC Oscillator as main clock. Its 1% accuracy is suitable for most applica- tions. -
Page 10: Internal Ram
NXP for full list of features for each GPIO. 4.1.5 The last six GPIO pins on P2 connector are inputs channels 0 to 5 for the 10-bit ADC of the LPC1224 micro- controller. The internal ADC uses the voltage on the Vref pin as reference voltage for the conversion. The LPC1224 break-out board integrates a 3.0V reference voltage LDO to provide a stable and accurate Vref to the LPC1224. -
Page 11: Reset And Isp Mode
The LPC1224 break-out board has no components on the I C bus, leaving the whole address space available for the user. The LPC1224 break-out board provides two 1.5kOhms pull-up resistors on both SDA and SCL lines. -
Page 12: Usb To Uart Bridge
The FTDI chip controls two "activity" leds for Rx (D3, the green one) and Tx (D4, orange one) data over the serial link. Removing jumpers J3 and J4 disconnects the USB to UART bridge from the LPC1224 micro-controller. page 12 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 13: Software
The LPC1224 break-out board can use the code from the apps/base sub-directory as there are very few differences between the LPC1224 break-out board and the GPIO Demo module. The only differences are the lack of EEPROM memory and temperature sensor on the I C bus and the SPI CS pin which is not used for I C clock activation for the EEPROM and thus fully available to the user. -
Page 14: Sample Code Entry Point
Alternatively you can download pre-compiled gcc toolchains (many different projects provide their own), or build your own one using crosstool-ng or similar projects. For more information on what is a (cross-)toolchain, have a look at this information page on elinux.org http://www.debian.org/ http://crosstool-ng.org/ http://elinux.org/Toolchains page 14 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 15: Build Command And Options
5.2.3 Build process The specific information about the target (LPC1224 micro-controller) memory (Flash and RAM) used by the linker is in the lpc_link_lpc1224.ld linker script. The vector table is defined in the core/bootstrap.c file, but the checksum of the first seven entries in the vector table is left unmodified. -
Page 16: Board Revisions History
First prototype version, with Rx and Tx crossed for UART1, making it impossible to connect them to USB to UART bridge. This board revision has not been sold. Added 3.0V LDO voltage regulator for Vref. Actual version sold as of writting of this documentation. Added a 100nF cap to Vref pin. page 16 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 17: Annexes
Annexes Schematics The board schematics and PCB layout have been created using KiCad EDA software suite. You can download the sources on the module page on Techno-Innov.fr. (See on next pages) http://www.kicad-pcb.org/display/KICAD/ http://www.techno-innov.fr/technique-lpc1224-bo/ page 17 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 21: Bom
Male headers GPIO (2 x 19 pins) P1, P2 2,54mm Fischer SL1.025.36Z 9729038 Table 6 – BOM by functional block Note : Components used on Board may change for functionnally equivalent references without prior notice page 21 / Techno-Innov - DomoTab http://www.techno-innov.fr... -
Page 22: Easy Order Version
fitness for a particular purpose. The entire risk as to the quality and performance of the LPC1224 break-out board is with you. Should the LPC1224 break-out board prove defective, you assume the cost of all necessary servicing, repair or correction.
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