Power Amplifier Circuit - JETStream JT220M Service Manual

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high and Q104 turns on. Q102 turns on and a voltage is applied to (8T).
The CPU in the control unit monitors the PLL (U205) LD signal directly. When the PLL is unlocked
during transmission, the PLL LD signal goes low. The CPU detects this signal and makes the TXC signal
low. When the TXC signal goes low, no voltage is applied to 8T, and no signal is transmitted. (See Fig. 7.)
Transmitter
 Outline
The transmitter circuit produces and amplifies the desired frequency directly. It FM-modulates the
carrier signal by
means of a varicap diode.

Power Amplifier Circuit

The transmit output signal from the VCO passes through the transmission/reception selection diode
(D203) and amplified by Q220, Q212 and Q214. The amplified signal goes to the final amplifier (Q216)
through a low-pass filter. The low-pass filter removes unwanted high-frequency harmonic components,
and the resulting signal is transmitted through the antenna terminal. (See Fig. 8.)
Q5
MIC
AMP
2SC1623
U505
Q218
D/A
VCO
CONVERTER
2SK508
M62364F
X200
U205
PLL
TCXO
LMX1511TM
192.0MHz
APC
Circuit
The automatic transmission power control (APC) circuit detects part of a final amplifier output with a
diode (D230, D231) and applies a voltage to U202. U202 compares the APC control voltage (PC)
generated by the D/A converter (U505) with the detection output voltage. U202 generates the voltage to
control Q214 and Q216 and stabilizes transmission output.
The APC circuit is configured to protect over current of Q214 and Q216 due to fluctuations of the load
CIRCUIT DESCRIPTION
Q101
8R
SW
Q108
SW
RXC
Fig. 7 Unlock circuit
U505
U504
D/A
BUFFER
CONVERTER
NJM2902
M62364F
Q209
Q207
BUFFER
Q207
2SC4226
2SC4226
Q210
RF AMP
2SC4226
Fig. 8
Transmitter system
8C
Q102
8T
SW
Q104
SW
TXC
U2
LD
U205
PLL
CPU
PLL lock
:LD"H"
.
U500
U504
NJM2902
MC33111
MIC/IDC
COMPANDER
Q220
Q212
RF AMP
DRIVE STAGE
2SC3357
2SK3078A
4
JT220M
U504
SPLATTER
FILTER
NJM2902
Q214
Q216
DRIVE AMP
FINAL AMP
RD07
MRF7042
ANT

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