Summary of Contents for EDT PCIe Gen1 Framegrabbers
- Page 1 User’s Guide Camera Link PCI Express (PCIe) Gen1 Framegrabbers High-speed image capture for Camera Link on PCIe platforms Doc. 008-04053-00 Rev. 2012 March 16...
- Page 2 © 1997-2012 Engineering Design Team, Inc. All rights reserved. FCC Compliance: EDT devices described herein are in compliance with part 15 of the FCC Rules. Operation is subject to two conditions: (1) The device may not cause harmful interference, and (2) the device must accept any interference received, including interference that may cause undesired operation.
- Page 3 Documentation is assumed by Buyer. The exclusion of implied warranties is not permitted by some jurisdictions. The above exclusion may not apply to Buyer. Disclaimer. Seller’s Products and Documentation, including this document, are subject to change without notice. Documentation does not represent a commitment from Seller. EDT, Inc.
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Page 4: Table Of Contents
Problems With Software Installation ....................21 Corrupted Images, Slow Acquisition, Timeouts, Data Loss..............22 Problems With Bandwidth ........................22 Problems Acquiring Images With EDT Applications ................23 Problems With Your Applications ......................24 Problems With Threads ........................24 Problems With Firmware ........................24... - Page 5 IRIG API ..............................34 simple_irig2.c............................34 libpdv.c ..............................34 pdv_irig.c, pdv_irig.h..........................34 irigdump.c ............................35 Appendix D: VxWorks ............................. 36 Initialization ..............................36 Applications With and Without File Systems....................36 Display Applications ........................... 36 Portability ..............................36 Revision Log ................................38 EDT, Inc.
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Page 6: Camera Link Pci Express (Pcie) Gen1 Framegrabbers
Example: RCX C-Link Coax2 – to extend Camera Link 600 feet over coax Included Files For the products covered in this guide, your EDT installation package includes device drivers for supported operating systems, as well as source code and binaries for: •... -
Page 7: Power Over Camera Link (Pocl)
(specifications) and user’s guide. To find general technical information that is not related to a particular EDT product (for example, cable pinouts for multiple products), go to www.edt.com... -
Page 8: Requirements
For details on requirements and bandwidth issues, see Problems With Bandwidth on page 22 **Cabling (standard or PoCL, as required) can be from EDT or a third party. For further documentation on cabling and pins, see Related Resources on page 2... -
Page 9: Programming Interface
– such as differences between Windows, Linux, and MacOS – will be noted in this guide. To interface to the Camera Link PCIe board, use subroutines from the EDT digital imaging library and, if necessary, from the EDT DMA library; routines in both libraries are documented in the EDT API. -
Page 10: Setting The Camera Model
After installing the board and its driver, configure it for the camera you will use. Your EDT installation package provides example configuration files for various camera models; if no file is provided for your camera, or if you wish to modify the directives of an existing configuration file, consult the... -
Page 11: Image Capture And Display
Camera Link PCI Express (PCIe) Gen1 Framegrabbers Image Capture and Display Image Capture and Display For capturing and displaying images, your EDT software contains a GUI in an application called PdvShow. The Windows version of this GUI is shown in Figure Figure 1. -
Page 12: Compiling Pdvshow
To install FLTK 1.1.9: 1. In , open and run... pdv_flshow fltk-1.1.9-source.tar.gz gunzip fltk-1.1.9-source.tar.gz tar –xf fltk-1.1.9-source.tar ...to install fltk-1.1.9 2. In , run... fltk-1.1.9 make make install 3. In , run... pdv_flshow make pdvshow EDT, Inc. 2012 March 16... -
Page 13: Units, Connectors, And Channels
DMA channel. Thus, in base mode, an EDT framegrabber with two connectors has two DMA channels. In medium or full mode, each camera requires two connectors on the EDT board. In this case, the two connectors work together to support one DMA channel. -
Page 14: Serial Communication
Most cameras have a manufacturer-defined serial command set for camera control and status. To utilize this capability, EDT boards implement serial transmit and receive using standard serial lines as defined by the Camera Link specification. You can use serial communication in a number of ways, as discussed below. -
Page 15: From Your Application
EDT installation package. From Your Application To see all of the routines needed for user applications to send and receive serial commands: In the EDT API (see Related Resources on page 2), follow the link to the EDT Digital Imaging Library, and then —... -
Page 16: Take
Shows how to use the API to acquire images from a camera connected to the Camera Link PCIe board and (optionally) save the images to files. To add image acquisition to an application, EDT recommends starting with this example, which shows how to use the ring buffer routines to improve performance by pipelining image acquisition and processing. -
Page 17: Simplest_Take
The unit number, if multiple boards are installed; default is 0 (first board). -u unit Treats the command argument as a hexadecimal number, which is sent to the camera without terminating nulls or carriage returns. The default is ASCII with a terminating carriage return added. EDT, Inc. 2012 March 16... -
Page 18: Dvinfo
By default, most cameras power up in continuous (also called freerun) mode, sending images continuously. For most cameras, EDT provides configuration files for freerun mode. For some cameras, EDT also provides configuration files for internal triggered, external triggered, or pulse-width mode. All of these modes and configuration details are described below. -
Page 19: Freerun (Continuous)
(usually not necessary because most cameras power up in freerun by default) Triggered by EDT Board In this mode, the camera waits for a trigger signal from your EDT board before acquiring an image. MODE_CNTL_NORM: 10 Configuration file directives:... -
Page 20: External Trigger Pass-Through
Simulation and Testing EDT Camera Link PCIe boards (excluding the FOX boards) include a channel 2 simulator for generating sample data with no camera attached to the board (useful for testing the board hardware). This channel uses a simple counter to generate 16-bit pixel data;... - Page 21 Because data is generated as fast as possible, you can also use the channel 2 simulator to measure the maximum bus bandwidth, using the utility application This utility takes the unit number as an cl_speed. argument and begins channel 2 simulation on the specified board; it then reports the data speeds achieved. EDT, Inc. 2012 March 16...
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Page 22: Firmware
At times, you may need to reprogram the PCI / PCIe interface flash memory using – for instance: pciload • if you want to switch from one mode to another (base, medium, full) on certain EDT boards; • if you want to convert an EDT simulator into a framegrabber, or vice versa; •... -
Page 23: Corrupted Firmware
(medium or full mode) mode camera of 40 MHz or more. * To find and load the firmware that converts this framegrabber into a PCIe8 DVa CLS simulator, consult the EDT Related Resources on page 2 Simulator User’s Guide (see Table 4. - Page 24 Camera Link PCI Express (PCIe) Gen1 Framegrabbers Firmware 4. On the EDT board with the corrupted firmware, move the jumper from its programmable to its protected setting (to locate this setting on your board, see Firmware on page 17). 5. Power up the host and board.
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Page 25: Troubleshooting
Try checking for these possible problems... — Typically, an EDT PCIe board will not work in a bus slot dedicated to graphics cards, or a bus slot wired for fewer lanes than the number specified – for instance, an eight-lane board will not work... -
Page 26: Problems With Software Installation
New Linux versions often require an updated device driver, so if you are using a new or updated Linux kernel and you have trouble with the EDT installation or device access, check to see if a new EDT installation package is available. -
Page 27: Corrupted Images, Slow Acquisition, Timeouts, Data Loss
Verify that the EDT board is in a PCIe slot that is wired electrically (not just physically) to support the number of lanes provided by the board. For example, an EDT x8 board requires a slot that is x8 or x16, while an EDT x4 board requires a slot that is x4, x8, or x16. -
Page 28: Problems Acquiring Images With Edt Applications
— moving the board to a different slot; — uninstalling and reinstalling the driver. For best performance, install your EDT board in a bus that is not shared with any other devices and that meets the board’s speed requirements, as discussed in Requirements on page EDT, Inc. -
Page 29: Problems With Your Applications
DMA library. The EDT Message Handler Library provides generalized error- and message-handling for EDT software libraries and can be helpful for debugging your programs. See the EDT Message Handler Library in the API for specific routines and usage. -
Page 30: Appendix A: Pin Assignments
* For PoCL, pins 1 and 26 change to +12V DC power, while pins 13 and 14 change to +12V DC power return. CAUTION! Never plug a non-PoCL device (camera, cable, extender, etc.) into an EDT board that has the PoCL jumpers in the “enabled” position. Doing so will cause a short – indicated by a red LED (which may be obscured by your backpanel) on the back of the board, near the associated connector –... -
Page 31: Appendix B: Board Diagrams
LED near the connector, never plug a non-PoCL = ground (pin) Not to scale; bold = default. cable or device into a PoCL-enabled EDT board. = ground (pin) Not to scale; bold = default. cable or device into a PoCL-enabled EDT board. -
Page 32: Pcie4 Dva Fox
LED, which is steady green if that transceiver is = ground (pin) Not to scale; bold = default. = ground (pin) Not to scale; bold = default. getting a valid signal. getting a valid signal. = ground (hole) = ground (hole) EDT, Inc. 2012 March 16... -
Page 33: Legacy Framegrabbers - Pcie "Dv"-Series
PCIe4 DV C-Link FPGA boot select FPGA boot select Optional Lemo Optional Lemo Programmable Programmable Base 0 / Base 0 / primary primary Protected Protected Not to scale; bold = default. Not to scale; bold = default. EDT, Inc. 2012 March 16... -
Page 34: Additional External Inputs
DV C-Link Trigger 1+ Trigger 0+ Trigger 1+ 3.3V Trigger 0- Reserved Trigger 0+ Trigger 1+ Trigger 0+ Trigger 0- Trigger 1- Trigger 0- IRIG-B IRIG-B IRIG-B Trigger 1- Reserved Trigger 1- Ground Ground Ground EDT, Inc. 2012 March 16... -
Page 35: Via Optional Cable Assembly
Appendix B: Board Diagrams Via Optional Cable Assembly For the PCIe8 DV / DVa C-Link and the PCIe4 DVa C-Link, there is an optional EDT-built cable assembly for triggering, timestamping, or both; below are the pin assignments (see also Appendix C: Timestamping). -
Page 36: Via Ribbon Cabling And D9 Connectors
Any EDT DV board Any EDT framegrabber Generic representation of an EDT framegrabber. Not to scale. Generic representation of any EDT DV board. Not to scale. Generic representation of an EDT framegrabber. Not to scale. EDT, Inc. 2012 March 16... -
Page 37: Appendix C: Timestamping
The time thus captured combines the time derived from an IRIG-B input with a high-resolution counter for computing fractional seconds. EDT’s current IRIG-B format (IRIG2) is the second such format used for Camera Link PCIe boards. NOTE EDT’s former IRIG-B format (IRIG1) is now obsolete. - Page 38 4; u_char irig_ok:1; u_char pps_ok:1; u_char had_irig_error:1; u_char had_pps_error:1; } status; u_char reserved[3]; double timestamp; /* holds a 64-bit unix seconds time */ /* This must be filled in by software */ } Irig2Record; EDT, Inc. 2012 March 16...
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Page 39: Irig Api
IRIG API In the EDT digital imaging library routines, extra data added by the board or software (outside of the defined image) typically is called a header. In this case, however, such data is at the end, so it is called a footer. -
Page 40: Irigdump.c
IRIG transfer or the 1 pps signal): void pdv_irig_reset_errors(PdvDev *pdv) To set the board in slave mode to use 1 pps or IRIG-B values received from another EDT board, rather than from the Lemo connector (note – this function requires a special cable from EDT):... -
Page 41: Appendix D: Vxworks
Camera Link PCI Express (PCIe) Gen1 Framegrabbers Appendix D: VxWorks Appendix D: VxWorks To run EDT products on VxWorks, you’ll need to contact EDT for instructions customized for your setup. NOTE VxWorks requires program arguments to be enclosed in double quotes (“ ”). Otherwise, all EDT command-line applications, utilities, and examples work the same as on other operating systems. - Page 42 Example: If global sets the global then next time the init_done = 0 my_prog() init_done = 1, program is run, will be 1. Thus, should reset right before exit. init_done my_prog() init_done = 0 EDT, Inc. 2012 March 16...
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Page 43: Revision Log
Below is a history of modifications to this guide. Date Rev. Detail 20120316 PH,RH 01 Created this new guide for PCIe framegrabbers by moving all non-PCIe framegrabbers into their own guide (for PCI, cPCI, and PMC). EDT, Inc. 2012 March 16...
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