Power Power - Keithley 775A Instruction Manual

The
signal
is
finally
coupled through C72
to
the
IGOMHz
buiier
Q38 and
its
associated
components.
6
Msasurtm#nt
Section
The meaawement
xsection
is
a block
which
controls
various
switching; routes the Internal signals
to
the correct ports.
It
also controls the
sequence
of
the gate
and
resets
and
synchronizes
the
time
and
the event counters
for
the
microcontroller.
Figures 5-2
to 5-7
show
the routes
for
the
input
signal
and
the reference signal in every
measurement
function.
The
following
is
a
brief
e^tanation
of
the various
segments
in
the
measurement
section.
Control— The control cimuit consists
of
U26,
U28 and
U50.
Information
from the mkrocontrolier
is
sent
in a serial
form
to
control the iCs
which
in
turn convert the
serial infor-
mation
to
a
parallel
format.
The
parallel
outputs
of
these
I,Cs
are
being
used
to
control the
D
to
A
converters
and
th.e
signal
routes as described previously.
Trigger
Level— The
trigger level circuit
comprises
U31,.
U32,
U33,
U2T U29 and
their
associated
components.
Binary'
data
which
is
received
horn the
control
circuit
is
converted
bv U31 and V27
to
a
known
DC
voltage
with
U32 and U29
respectively.
U33
is
a
t-5v voltage reference
with
very
good
stability,
adjusts the
full
scale
voltage of the
D
to
A
converter,
Signal Selector—
Tne
signal selector
circuit
comf>rises U37,
U3bci
and
U38b,
One
of Sig 0
through
Sig 3
a.re
selected
to
be transmitted
to
the
time
detect, signal identifier or
the
synchronizer.
Tiine
Detect—The time
detect circuit
consists
of a
dual
D
fsiP-rktp
U39 and
a gate
Ub8d. U39a
receives the
start
signal
and T39b
(dk
in)
receives a
stop
signal.
Following
a reset
signal
at
the
reset
input of
U39,
U38d
outputs
a single
neg.ai:Jve
going pulse with
a
duration
which
is
equal
to the
time
interval
between
the
start
and the stop
signals,
regardless
if
the
start
and the stop
signals are repetitive,
Synchmnizer—The synchronizer consists
of a
D
flip-flop
U40a and
a gate
U38c and
their associated
components.
A
gate signal
is
applied
from the microcontroller
to
the
D
in?.nit
of
U40a
and
the
measured
signal
is
coupled
to
the
CLK
mput
on,
the
same
IC.
Aiter a reset cycle,
and assum-
ing
that
a
signal
is
prcvSent at
the appropriate input
ter-
minal,
the
output
of
U40a
will
generate
a
pulse
with,
an
approximate width
of
the
original
gate
signal
from
the
microcontroller,
but with
a
new
adjusted
width which
is
equal
to
an
integer
number
of
periods
of
the
signal
being
measured, This pulse will
be used
as
the
main
gating
signal
throughout the instrument.
Gates U42a,
U42b and
U-i2d control
the routing
of
the
synchronized
gate
and
the
time
interva]
pulses
to
the
main
gate of the
Model
775-U42C.
Main Gate—The main
gate of
the
Model
775 consists
on
U42c. Signals from the
synchronizer
or the
time detector
are applied
to
one
input
of
this
gate
and
the
lOOMHz
reference signal
is
applied
to
the second input resulting
at
the
output
of
the gate a
lOOMHz
burst
of
pulses.
Cock
Divider—
The
burst
of
pulses
with
a
frequency
of
lOOMHz
divided by
two
by
U41b and
applied
to
the
ECL
to
the
TTL
converter
which
in
turn outputs
a
TTL
signal
through
U43a
to
the dividers chain.
Signal
Divider—'fhe signal
coming from
the
synchronizer
circuit is
divided
by two
using
a
D
flip-flop
U40b and
ap-
plied
to
the
ECL
to
the
TTL
converter
which
In turn
out-
puts
a
TTL
signal
through
U49b
to
the divider chain,
Signal ldentifier~Tbe
signal identifier
comprises U41a,
Q2S
and
Q29 and
their associated
components.
A
signal
when
present
at
the appropriate input terminal,
is
applied to
the
CLK
Input of U41a, converted to a 'FTL
level
signal with
Q28 and Q29 and then
fed
to
one
of
the microcontroller
ports via
U49a, This port
will
be used
to flag
the
presence
of a signal
at'
the input
terminals.
This
signal
is
also
used
as the
aiming
signal
of
the
counter.
Gate Identifier—
The
gate ident^er informs the
rricrocori-
troiler
of theistate of
the
main
gate.
The
gate identifier dr-
aiit
also
serves as a time stretcher of gate signals
with
very
small periods.
The
gate
identtfiei
consists of U43b,- Q33,
CIO and
is
buffered
by
U43d
and
U43c,
Event
Counter— The
ev'ent
counter counts
the
number
of
puises or
e.'ents
which
occur
at
the input tenninal.
The
ev€'nt
counter comprises a high speed divider chain
which
is
formed by
the signal
divider circuit in
combination
v/ith
U44 and U45 and
a
low speed counter
U12.
Time
Counter— The
time counter counts the
number
of
pulses
from the reference
oscillator.
The
time counter com-
pri.ses
a
high speed divider chain
which
is
formed
by
the
dock divider
circuit in
combination with
U46, U47a,
U48
and
a
low speed counter
U13.
5.3.7
Power
Supply
For the following discussion, refer to the
power suppjy
schematic
at
the
end
of
the
manual.
The power
supply
is
made up
of
a line fuse,
power
on-off switch, line
voltage
selection
switch,
power
transformer,
two
bridge
rectifiers,
two
regu-latora
and
a
5V
regulator
which
is
formed
b)'
U54,
Q40,
Q41 and Q39 and
their
associated
components.
Fuse
FI
is
the
LINE FUSE
which
is
accessible
on
the
rear
panel,
S2
is
the
LINE
VOLTAGE SELECT
switch
which
is
accessible
on
the rear
panel
to select
115V or
230V
opera-
tion
and
51
is
the
power
on-off switch.