LG -A155 Service Manual page 33

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3. TECHNICAL BRIEF
3.6.2 Features
Device Architecture
- Flash Die Density: 256MB
- PSRAM Die Density: 64MB
- x16 Non-Mux or AD-Mux I/O Interface Options
Device Voltage
- Core: VCC = 1.8 V
-I/O: VCCQ = 1.8 V
Device Packaging
- Ballout: x16C with 107 Active Balls, QUAD+ with 88 Active Balls, or 56-ball NOR/PSRAM AD-Mux
- Area: 8x8 mm to 11x13 mm
-Height: 1.0 mm to 1.4 mm
PSRAM Performance
- 70 ns Initial Read Access; 20 ns Asynchronous Page-Mode Read
- Up to 104 MHz with 7 ns Clock-to-Output Synchronous Burst-Mode Reads
- Configurable 4-, 8-, 16- and Continuous-Word Burst-Length Reads and Writes
- Partial-Array and Temperature Compensated Self Refresh
-Programmable Output Impedance
Quality and Reliability
- Extended Temperature –25 C to +85 C
- Minimum 100K Flash Block Erase Cycles
- ETOX™ IX (Flash) and ETOX™ X (Flash)
- Technology on 128 Mbit, 256 Mbit, and 512Mbit M18 die; ETOX™ X (Flash) on 1 Gbit M18 die
Flash Performance
-96 ns Initial Read Access; 15 ns Asynchronous Page-Mode Read
-Up to 133 MHz with 5.5 ns Clock-to-Data Output Synchronous Burst-Mode Read
-Buffered Enhanced Factory and 1.8 V Low-Power Buffer Programming Modes:2 s/Byte (Typ)
-Deep Power-Down Mode: 2 A (Typ)
-Configurable Output Driver
Flash Architecture
-Multi-Level Cell Technology
-Hardware Read-While-Program/Erase
-Symmetrically Blocked Array
-Eight Partitions
-Configurable 8-, 16-, or Continuous-Words Burst Length Reads
-2-Kbit One-Time Programmable User Protection Register Bits
-Zero-Latency Block Locking
-Automated Blank Check Mode
Flash Software
-Numonyx™ FDI and Numonyx™ PSM
-Common Flash Interface
-Basic and Extended Flash Command Set
LGE Internal Use Only
3. TECHNICAL BRIEF
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Copyright © 2010 LG Electronics. Inc. All right reserved.
3. TECHNICAL BRIEF
Only for training and service purposes

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