Transceiver (Ad6548, U503) - LG KP110 Service Manual

3.2 Transceiver (AD6548, U503)

The AD6548 provides a highly integrated direct conversion radio solution that combines, on a single chip, all
radio and power management functions necessary to build the most com-pact GSM radio solution possible.
The only external components required for a complete radio design are the Rx SAWs, PA, Switchplexer and a
few passives enabling an extremely small cost effective GSM Radio solution. The AD6548 uses the industry
proven direct conversion receiver architecture of the OthelloTM family. For Quad band applications the front
end features four fully integrated programmable gain differential LNAs. The RF is then down converted by
quad-rature mixers and then fed to the baseband programmable-gain amplifiers and active filters for channel
selection. The Receiver output pins can be directly connected to the baseband analog processor. The Receive
path features automatic calibration and tracking to remove DC offsets. The transmitter features a translationloop
architecture for directly modulating baseband signals onto the integrated TX VCO. The translation-loop
modulator and TX VCO are extremely low noise removing the need for external SAW filters prior to the PA.
The AD6548 uses a single integrated LO VCO for both the receive and the transmit circuits. The synthesizer
lock times are optimized for GPRS applications up to and including class 12.
AD6548 incorporates a complete reference crystal calibration system. This allows the external VCTCXO to be
replaced with a low cost crystal. No other external components are required. The AD6548 uses the traditional
VCTCXO reference source. The AD6548 also contains on-chip low dropout voltage regulators (LDOs) to
deliver regulated supply voltages to the functions on chip, with a battery input voltage of between 2.9V and 5.5V.
Comprehensive power down options are included to minimize power consumption in normal use. A standard 3
wire serial interface is used to program the IC. The interface features low-voltage digital interface buffers
compatible with logic levels from 1.6V to 2.9V.
Copyright © 2008 LG Electronics. Inc. All right reserved.
Only for training and service purposes
Figure 3.3 AD6548 Block Diagram
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3. TECHNICAL BRIEF
LGE Internal Use Only