Panasonic PT-50LC13 Service Manual page 30

VIDEO SIGNAL PATH I BLOCK DIAGRAM (1/2)
REAR JACK C.B.A.
JK3601
COMPONENT
-Y1
COMPONENT
-PB1
COMPONENT
-PR1
JK3602
COMPONENT
-Y2
COMPONENT
-PB2
COMPONENT
-PR2
JK3603
COMPONENT
-Y3
COMPONENT
-PB3
COMPONENT
-PR3
JK3604
COMPONENT
-Y4
COMPONENT
-PB4
COMPONENT
-PR4
JK3501
Y
S-VIDEO IN1 C
VIDEO IN1
Y
S-VIDEO IN2 C
VIDEO IN2
FRONT JACK C.B.A.
JK4801
Y
P3902-3 P3502-3
S-VIDEO IN3 C
P3902-5 P3502-5
VIDEO IN3 P3902-7 P3502-7
TUNER C.B.A.
U7001
(MAIN TUNER)
TP7001
Q7002
RF-IN
VIDEO 25 P7002-1 P3501-1
RF-OUT
R7011
MAIN TUNER
VIDEO LEVEL
U7101
(SUB TUNER)
Q7101
RF-IN VIDEO P7002-3 P3501-3
25
TP7101
JK3502
Q3501
Q3502
C
S-VIDEO B
Y
OUT B
Q3503
VIDEO OUT B
IC3602 (SW)
14
16
18
TP3603
5
7
9
57
MAIN Y/V
46
59
MAIN PB/C
44
61
MAIN PR
43
48
SUB Y/V
38
50
SUB PB/C
36
52
SUB PR
35
VIDEO
INPUT
IC3501 (AUDIO/VIDEO SW) SELECT
63
1
8
15
30
MAIN S-VIDEO-C TP3606
47 67
3
10
17 MAIN S-VIDEO-Y
/MAIN VIDEO
44 66
5
12
VIDEO
19
INPUT
SELECT
SUB
S-VIDEO-Y
56 74
SUB
VCC
S-VIDEO-C 58 75 31
VCC 47
49
VCC
1
SUB VIDEO 53
2
LOGIC
3
FROM
34 I2C SERIAL DATA
LOGIC SYSTEM CONTROL
33 I2C SERIAL CLOCK
BLOCK DIAGRAM
37
39
41
VCC 42 SW +9V
MAIN C.B.A.
IC5002 (5.6M FIFO MEMORY)
5.6M FIFO
MEMORY
1,13,19,22,35,41,
49,52,53,58,66
+3.3V VCC
+3.3V
TP3602
TP3601
Q5001 Q5006 Q5010
P3601-18 P3403-18 B LPF B B
Q5012,
Q5002 Q5007
Q5013
P3601-16 P3403-16 B LPF B B
Q5003 Q5008 Q5011
P3601-15 P3403-15 B LPF B B
Q5015 Q5023 Q5027
P3601-13 P3403-13 B LPF B B
Q5029,
Q5016 Q5024 Q5030
P3601-11 P3403-11 B LPF B B
Q5017 Q5025 Q5028
P3601-10 P3403-10 B LPF B B
TP3604
TP3605
JK5801
TMDS DATA0(+)
90
TMDS DATA0(-)
91
TMDS DATA1(+)
85
TMDS DATA1(-)
86
TMDS DATA2(+)
DVI-IN
80
TMDS DATA2(-)
81
TMDS CLOCK(+)
93
TMDS CLOCK(-)
94
DDC CLOCK
DDC DATA
IC5802 (EEPROM)
Q5802
I2C SERIAL CLOCK 6 DRIVE 100
Q5801
I2C SERIAL DATA 5 DRIVE
8 VCC
RESET(L) <FROM IC6003(73)>
+5V
FRONT JACK C.B.A.
JK3901
R
P3901-1 P5501-1
G
P3901-3 P5501-3
B
P3901-5 P5501-5
+9V RGB-IN 2
H-SYNC
P3901-7 P5501-7
V-SYNC
P3901-9 P5501-9
+5V
JK5501
R
G
B
RGB-IN 1
H-SYNC
V-SYNC
+5V
RGB1(H)RGB2(L)
<FROM IC6003(22)>
IC5005 (MAIN VIDEO SIGNAL PROCESS)
123-127,140-144
120-122,128,129,
138,139,145-147
R
2,18,34,47,60,107,119,
132,149,166,181,185,
G
195,197,208,213,224
+3.45V VCC 153-160
Y/PB/PR --RGB CONVERTER
B
SHARPNESS CONTROL
IC5006 199-206
67,69,77,79,89,91,100
TINT CONTROL
+2.5V
5 4 VCC
76MHz CLOCK
REG. COLOR CONTROL
V-SYNC
BRIGHTNESS CONTROL
IC5004 H-SYNC
173,177,189,229,233
+2.5V
5 4 VCC
REG. Y
IC5003 3,17,33,46,59,106,131,
PB/PR
151,170,183,193,211,
+2.5V
236,241,246,253
1 3 VCC
REG.
CLOCK
V-SYNC
Y/V
H-SYNC
95 A/D
3D Y/C SEPARATION Y/PB/PR
PB/C
72 A/D
NTSC DECODER
PR
83 A/D
GCM2+
CARD Y/PB/PR DATA(8BIT)
FROM SD/PC CARD
SIGNAL PROCESS
CARD V-SYNC
BLOCK DIAGRAM
CARD H-SYNC
IC5803 (DVI DECODER)
R
R DATA(8BIT)
30-37
ENCRYPTED UUENCRYPTED
G
DATA (24 bit) DATA (24 bit) PANEL G DATA(8BIT)
TMDS
XOR
INTERFACE
20-27
DECODER
MASK
LOGIC
B
B DATA(8BIT)
10-17
CONTROL
I2C SERIAL CLOCK
47
3 I2C SERIAL DATA
44
48
1 RESET(L)
6,18,29,38
82,84,88,95,97
43,57,67,78
VCC VCC
IC5801 IC5503
+3.3V +3.3V
+3.3V +5V 3 2 +5V 8 1
REG. REG.
IC5504 (A/D CONVERTER)
26,27,34,35,
FROM
I2C
I2C SERIAL DATA 1 57 39,42,45,46,
SYSTEM CONTROL
CONTROL 51,52,59,62
I2C SERIAL CLOCK 1 56 VCC
BLOCK DIAGRAM
11,22,23,
69,78,79
IC5501 (SW)
VCC +3.3V
TP5501
Q5507
H R
1 A/D
L 21 B 54 70-77
CONVERTER
7
TP5502
Q5508
H G
3 A/D
L 19 B 48 2-9
9 CONVERTER
Q5509
H B
5 A/D
L B
15 43 12-19
CONVERTER
11
TP5503
A/D H-SYNC 66
A/D CLOCK 67
H-SYNC 30
V-SYNC 31
H
24
L 22 TP5504 TP5505
23
IC5502 (SYNC SEPARATION)
H
12 4
L 14
13
Q5510
SYNC
6 13
SEPARATION
20 VCC
16
8 14
+5V 16 VCC
VIDEO SIGNAL PATH I BLOCK DIAGRAM (1/2)
6-13
16
162
163
36-45
22-31
32
21
20
49-58
PT-50LC13