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Summary of Contents for Mesa 7I33
- Page 1 7I33 / 7I33TA MANUAL Quad analog servo amp interface V1.9...
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Page 3: Table Of Contents
CONNECTORS ............3 7I33 CONNECTOR LOCATIONS AND DEFAULT JUMPERS ... . . 3 7I33 CONNECTOR LOCATIONS AND DEFAULT JUMPERS . -
Page 4: General
The controller connection is a 50 pin header that matches the pinout of the Mesa 4I27 motion controller (2 axis only) or the FPGA based Anything I/O cards. The 7I33 uses another 50 pin header for servo amp/encoder connections, while the 7I33TA uses Phoenix compatible 3.5 mm headers and comes with supplied pluggable terminal blocks. -
Page 5: Hardware Configuration
7I33. If you are using TTL encoder inputs on a pre-rev D 7I33 card with a FPGA card having 3.3K pull-up resistors, it is best to remove the pull-up resistor SIP packages connected to the 7I33 from the FPGA card. -
Page 6: Connectors
CONNECTORS 7I33 CONNECTOR LOCATIONS AND DEFAULT JUMPER POSITIONS 7I33 3... -
Page 7: 7I33 Connector Locations And Default Jumpers
7I33TA CONNECTOR LOCATIONS AND DEFAULT JUMPER POSITIONS 7I33 4... -
Page 8: Controller Connector
AUX 5V POWER 4 pin header P1 or 2 pin terminal block P1 can be used to supply 5V power to the 7I33 if the controller cable is too long and voltage drop too high. P1 has the following pinout: FUNCTION (Rev. -
Page 9: 50 Pin Servo Amp/Encoder Connector
50 PIN SERVO AMP/ENCODER CONNECTOR The 7I33s servo amplifier / encoder connector (P2) is a 50 pin latching header. P2 has the following pinout: FUNCTION DIRECTION FUNCTION DIRECTION ENCA2 TO 7I33 ENCA0 TO 7I33 /ENCA2 TO 7I33 /ENCA0 TO 7I33 ENCB2... -
Page 10: Terminal Block Servo Amp/Encoder Connectors
ENCODER 2 5V POWER ENCX2 TO 7I33TA ENCODER 2 INDEX /ENCX2 TO 7I33TA ENCODER 2 INVERTED INDEX FROM 7I33TA ANALOG 2 GROUND DRV2 FROM 7I33TA ANALOG 2 OUT FROM 7I33TA SHIELD GND ENA2 FROM 7I33TA ENABLE 2 OUT 7I33 7... - Page 11 ENCODER 3 5V POWER ENCX3 TO 7I33TA ENCODER 3 INDEX /ENCX3 TO 7I33TA ENCODER 3 INVERTED INDEX FROM 7I33TA ANALOG 3 GROUND DRV3 FROM 7I33TA ANALOG 3 OUT FROM 7I33TA SHIELD GND ENA3 FROM 7I33TA ENABLE 3 OUT 7I33 8...
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Page 12: Operation
OPERATION PWM RATE The 7I33 is meant to operate with PWM rates from 100 KHz to 10 MHz. Operation at lower PWM rates will result in excessive output ripple . When used with SOFTDMC firmware, it is best to set the PWM rate to the maximum (192 KHz). If the motion control firmware is capable of generating interleaved PWM, that option should be enabled to minimize output ripple. -
Page 13: 5V Power
Normally motor drives have differential inputs to reduce noise on their analog inputs. To make the best use of this feature, the 7I33 should be wired to the drive with shielded twisted pair wiring. Different drives have different input signal names, but typical connections are 7I33 DRV to drive INPUT+, 7I33 GND (adjacent to DRV) to drive INPUT- (these two signals are the twisted pair). -
Page 14: Specifications
MINIMUM AOUT LOAD RESISTANCE OUTPUT RIPPLE @ 100 KHZ PWM % FS OUTPUT RIPPLE @ 6 MHz PDM % FS LINEARITY (PWM or PDM) % FS ENCODER FREQUENCY (TTL) ENCODER FREQUENCY (RS-422) OPERATING TEMP. OPERATING TEMP. (-I version) OPERATION HUMIDITY NON-COND 7I33 11... -
Page 15: Drawings
DRAWINGS 7I33 12... - Page 16 DRAWINGS 7I33 13...
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