Signal Block Diagram - Panasonic TC-20LB30 Service Manual

10.3. Signal Block Diagram

TU001
TUNER
SCL
10
SDA
11
AFT
12
AUDIO OUT
13
VIDEO OUT
17
GS-BOARD
SD
IC6510
CARD
GS2
SLOT
CMD
SDCMD 2
CLK
SDCLK 5
DATA
SDDAT0 7
XCD
SDDET 10
WP
SDWP 12
PC
CARD
JG1
SLOT
2 6
30 32
37 41
64 66
8
11 12
22 29
CD1
36
CD2
67
CONTROL
CONTROL
TC-20LB30
Signal Block Diagram
JK3001
AV_IN1
C Y
V
L
R
AV_IN2
C Y
V
L
R
WHITE
JK3004
COMPONENT
RED
Y-SW
Y
Y
Y-G
JK3002A
PB
COMPONENT PB
PB-G
PR
PR
PR-G
TA-BOARD
IC2201
MTS
21
LOUT
14
MPX IN
ROUT 22
SCL 18
SDA 19
Q001
JG-BOARD
GS4A JG6
BUFFER
RDYBSY
5 5
REG
3 3
BVD1
1 1
SDCDIM
7 7
SDWP
8 8
IC6522
INVERTER
IC6503
BUFFER
D0 D15
OE
DATA
DATA BUS
DIR
A0 A10
ADDRESS BUS
ADDRESS
IC6502
IC6506,IC6507
DIRECTION
BUFFER
IC6501
DIRECTION CONTROL
IC6508
REG,RESET,IOWR,IORD
BUFFER
FWE,FOE,CE1,CE2
CONTROL SIGNAL
IC6509
WAIT,RDYBSY,WP
BUFFER
BVD1,BVD2,INPARK
CONTROL SIGNAL
C
Y
C-G
Y-G
SW
G
V-SW
V
V-G
L
L-G
R-SW
R
R-G
C
Y
C-G
Y-G
SW
G
V-SW
V
V-G
L
L-G
R-SW
R
R-G
L
R
TA1 A1
2 AFT OUT 2
4 TV L 4
6 TV R 6
8 SCL1 8 SCL1-5
SDA1-5
9 SDA1 9
TA2
A2
TV V
2 2
IC6513
MCU(JPEG)
RDY_BSY
RDY/BSY
REG
REG
CARD
BVD1
Y0 Y7
BVD1
I/F
YC
CD1
OUT
CD2
C0 C7
SDWP
SDCD GPI0
PCCENA
RXD
TXD
D0 D15
FD0
SYSID0
DATA
BUS
FD15
A1 A10
FA0
ADDRESS
BUS
FA19
MRESET
CONTROL
IORD,FOE
SDRAM
CE1,CE2
I/F
CARD
I/F
EXT.SDRAM
I/F
IC3001
AV SW
6
C
8
Y
L 49
AUDIO
42 AV
S2-1
OUT
IN1
2 V R 51
4 L
5 R
C 18
JPEG
20
Y
12
C
14 Y
44 S2-1 AV SY OUT 52
IN2
10 V
9 L
PR
11 R
PR OUT 64
19 SW
PB
56
PB OUT
V/Y
27 L V OUT 54
29 R
25 SW
COMPONENT
26
Y
28
PB
SDA1-5
61
SDA1
30
PR
SCL1-5
SCL1 59
21 TV1L DC OUT 53
22 TV1R TV
24 TV1V
IC1011
SWITCHING
L
6 5
3
R
2 1
7
IC6516
D/A ENCODER
(NTSC)
JG3 A7
Q6501
Y Y 5 Y 10
Q6505
Q6502
C C 3 C 12
Q6506
IC6501
AND GATE
RXD
8 7
D3.3V
9 TXD 6
1 IDO 14
IC6520
RESET
Q6503
6 RESET 9
Q6504
IC6514
128Mbit SDRAM
IC6512
8Mbit FLASH
IC2320
SOUND CONTROL
1 LOUT 25
LIN
2 RIN ROUT 24
30 31
SDA1-5
SCL1-5
IC
S
STB 5V
5
Q1013
Q1005
SCL1-5
SDA1-5
Q3001,Q3006,Q300
A-
27